Semiconductor memory device having local bit line with insulation layer formed therein | Patent Publication Number 20170263681

US 20170263681 A1
Patent NumberUS 09831290 B2
Application Number15066410
Filled DateMar 10, 2016
Priority DateMar 10, 2016
Publication DateSep 14, 2017
Original AssigneeToshiba
Current AssigneeToshiba Memory Corporation
Inventor/ApplicantsKenichi Murooka
Shuichi Toriyama
Tatsuya Ohguro
Shintaro Nakano
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