CMOS circuit having a tensile stress layer overlying an NMOS transistor and overlapping a portion of compressive stress layer | Patent Number 09373548

US 09373548 B2
Application Number12199659
Publication NumberUS 20090008718 A1
Pendency7 years, 10 months
Filled DateAug 27, 2008
Priority DateSep 18, 2006
Publication DateJan 8, 2009
Expiration DateSep 17, 2026
Inventor/ApplicantsJohannes van MEER
Scott D. LUNING
Scott D. Luning
Gen Pei
Gen PEI
Johannes van Meer
ExaminesMAI, ANH D
Art Unit2829
Technology Center2800
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