Planarized semiconductor interconnect topography and method for polishing a metal layer to form interconnect | Patent Application Number 9779123

9779123
Not Appealed
Patent NumberUS 06849946 B2
Publication NumberUS 20020106886 A1
Filled DateFeb 7, 2001
Priority DateAug 31, 1998
Inventor/ApplicantsChristopher A. Seams
Anantha R. Sethuraman
Anantha R. Sethuraman
Christopher A. Seams
ExaminesLEE, HSIEN MING
Art Unit2823
Technology Center2800
Assignments
Phorus Inc.
Current
Ibiquity Digital Corporation
Current
Tessera Advanced Technologies Inc.
Current
Dts
Current
Tessera Xperi
Current
Invensas Corporation
Current
Cypress SemiconductorInfineon Technologies Ag
Original
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