Integrated circuit with mixed row heights | Patent Publication Number 20220149033

US 20220149033 A1
Patent NumberUS 11769766 B2
Application Number17585402
Filled DateJan 26, 2022
Priority DateNov 28, 2017
Publication DateMay 12, 2022
Original AssigneeTaiwan Semiconductor Manufacturing Company
Current AssigneeTaiwan Semiconductor Manufacturing Company
Inventor/ApplicantsYi-Kan Cheng
Yi-Kan CHENG
Chung-Hsing Wang
Kam-Tou Sio
Jiann-Tyng Tzeng
Chung-Hsing WANG
Jiann-Tyng TZENG
Kam-Tou SIO
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