Hardware managed power collapse and clock wake-up for memory management units and distributed virtual memory networks | Patent Publication Number 20170285705
US 20170285705 A1Patent NumberUS 10386904 B2
Application Number15086054
Filled DateMar 31, 2016
Priority DateMar 31, 2016
Publication DateOct 5, 2017
Original AssigneeQualcomm Technologies Inc.
Current AssigneeQualcomm Technologies Inc.
Inventor/ApplicantsBohuslav RYCHLIK
Steven John Halter
Jaya Prakash SUBRAMANIAM GANASAN
Christophe Denis Bernard AVOINNE
Steven John HALTER
Dipt Ranjan PAL
Manokanthan Somasundaram
Myil Ramkumar
Sina Dena
Christophe Denis Bernard Avoinne
Jaya Prakash Subramaniam Ganasan
Paul Christopher John Wiercienski
Jason Edward Podaima
Paul Christopher John WIERCIENSKI
Jason Edward PODAIMA
Sina DENA
Manokanthan SOMASUNDARAM
Myil RAMKUMAR
Dipti Ranjan Pal
Bohuslav Rychlik
Steven John Halter
Jaya Prakash SUBRAMANIAM GANASAN
Christophe Denis Bernard AVOINNE
Steven John HALTER
Dipt Ranjan PAL
Manokanthan Somasundaram
Myil Ramkumar
Sina Dena
Christophe Denis Bernard Avoinne
Jaya Prakash Subramaniam Ganasan
Paul Christopher John Wiercienski
Jason Edward Podaima
Paul Christopher John WIERCIENSKI
Jason Edward PODAIMA
Sina DENA
Manokanthan SOMASUNDARAM
Myil RAMKUMAR
Dipti Ranjan Pal
Bohuslav Rychlik
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