Method for depinning the fermi level of a semiconductor at an electrical junction and devices incorporating such junctions | Patent Number 09209261
US 09209261 B2Filled DateJun 18, 2015
Priority DateAug 12, 2002
Publication DateOct 8, 2015
Expiration DateDec 8, 2023
Inventor/ApplicantsDaniel E. Grupp
Daniel J. Connelly
Daniel J. Connelly
ExaminesHARRISON, MONICA D
Art Unit2896
Technology Center2800
Law Firm
You must be logged in to view
LoginAttorneys
Subscription-Only
View Concierge ProgramSee the invalidated claims, subscribe to our Concierge Program.
View Concierge ProgramEmpower your practice with Patexia Publication Prosecution IP Module.
Get access to our exclusive rankings and unlock powerful data.
Looking for a Publication Attorney?
Get in touch with our team or create your account to start exploring a
network of over 120K attorneys.