Memory chip with settable termination resistance circuit | Patent Number 07532523
US 07532523 B2Filled DateJul 31, 2006
Priority DateJul 31, 2006
Publication DateFeb 15, 2007
Expiration DateJul 30, 2026
Inventor/ApplicantsChristian Weis
Georg Braun
Eckehard Plaettner
Georg Braun
Eckehard Plaettner
ExaminesSOFOCLEOUS, ALEXANDER
Art Unit2824
Technology Center2800
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