Methods and system for improving integrated circuit layout | Patent Number 07448012

US 07448012 B1
Application Number10907814
Publication Number-
Pendency3 years, 6 months, 24 days
Filled DateApr 15, 2005
Priority DateApr 21, 2004
Publication Date-
Expiration DateApr 21, 2024
Inventor/ApplicantsQi-De Qian
ExaminesLEVIN, NAUM B
Art Unit2825
Technology Center2800
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