CROSS-REFERENCE TO RELATED APPLICATIONS

This application claims priority to and the benefit of Chinese Patent Application No. 202110427387.9, filed Apr. 20, 2021, which is incorporated herein by reference in its entirety.

FIELD

The present invention relates to electronic circuits, more specifically, the present invention relates to switching regulators and the method thereof.

BACKGROUND

In the applications such as lighting and TV, the power supply is directly obtained from the power grid. Power factor correction (PFC) technology is widely used in order to prevent pollution to the power grid. However, total harmonic distortion (THD) would be worse because of the influence of the inverse inductor current around the valley of the alternating current (AC) input voltage. In addition, as the AC input voltage increases from its valley, the sinusoidal degree of the input current worsens due to the influence of the safety capacitor and the input capacitor, which affects the power factor (PF).

Thus, compensation for the THD and PF is needed.

SUMMARY

It is an object of the present invention to provide an improved switching regulator, which solves the above problems.

In accomplishing the above and other objects, there has been provided, in accordance with an embodiment of the present invention, a switching regulator, comprising: a power stage, configured to convert an AC input voltage to an output voltage to power a load, the power stage at least having a main power switch; and a control circuit, configured to generate a control signal in response to the AC input voltage and the output voltage, to control the ON and OFF of the main power switch, so that the main power switch has different ON time durations under different AC input voltage conditions and different load currents; the ON time duration of the main power switch consisting of a basic time duration, a product of a THD compensate time duration and a first coefficient, and a product of a PF compensate time duration and a second coefficient.

In addition, there has been provided, in accordance with an embodiment of the present invention, a control circuit used in a switching regulator, the switching regulator including a power stage configured to converting an AC input voltage to an output voltage to power a load, the control circuit comprising: a proportional integral circuit, configured to generate a proportional integral signal in response to the output voltage and a voltage reference; a basic ON time duration unit, configured to generate a basic signal in response to a peak value of the AC input voltage and the proportional integral signal; a THD compensate circuit, configured to generate a THD compensate signal and a first coefficient in response to the AC input voltage and the proportional integral signal, to output a product of the THD compensate signal and the first coefficient; a PF compensate circuit, configured to generate a PF compensate signal and a second coefficient in response to the AC input voltage and the proportional integral signal, to output a product of the PF compensate signal and the second coefficient; and a logical unit, configured to generate a control signal in response to the basic signal, the product of the THD compensate signal and the first coefficient, and the product of the PF compensate signal and the second coefficient, to control a main power switch in the power stage.

Furthermore, there has been provided, in accordance with an embodiment of the present invention, a method used in a switching regulator, the switching regulator including a power stage having a main power switch, periodically controlled to be turned on and off, the method comprising: converting an AC input voltage to an output voltage, to provide power a load; adjusting an ON time duration of the main power switch in response to the AC input voltage and a load current, the ON time duration of the main power switch consisting of a basic time duration, a product of a THD compensate time duration and a first coefficient, and a product of a PF compensate time duration and a second coefficient; and setting the first coefficient and the second coefficient to be different values when the AC input voltage and the load current are in different conditions.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 schematically shows a switching regulator 100 in accordance with an embodiment of the present invention.

FIG. 2 schematically shows a circuit configuration of the controller 102 in accordance with an embodiment of the present invention.

FIG. 3 schematically shows a switching regulator 300 with a circuit configuration of the power stage 101 in accordance with an embodiment of the present invention.

FIG. 4 schematically shows a flowchart 400 of a method used in a switching regulator in accordance with an embodiment of the present invention.

The use of the similar reference label in different drawings indicates the same of like components.

DETAILED DESCRIPTION

Embodiments of circuits for switching regulator are described in detail herein. In the following description, some specific details, such as example circuits for these circuit components, are included to provide a thorough understanding of embodiments of the invention. One skilled in relevant art will recognize, however, that the invention can be practiced without one or more specific details, or with other methods, components, materials, etc.

The following embodiments and aspects are illustrated in conjunction with circuits and methods that are meant to be exemplary and illustrative. In various embodiments, the above problem has been reduced or eliminated, while other embodiments are directed to other improvements.

FIG. 1 schematically shows a switching regulator 100 in accordance with an embodiment of the present invention. In the example of FIG. 1, the switching regulator 100 comprises: a power stage 101, configured to receive an alternating current (AC) input voltage V_acvia a rectifier B₁, a safety capacitor (i.e., a X capacitor) C_X, and an input capacitor C_IN, to provide an output voltage V_Oto power a load, the power stage 101 at least having a main power switch S₁. The power stage 101 comprises at least a main power switch S₁. The switching regulator 100 further comprises: a control circuit 102, configured to generate a control signal G_SWin response to the AC input voltage V_acand the output voltage V_O, to control the ON and OFF of the main power switch S₁, so that the main power switch S₁has different ON time durations at each switching cycle under different AC input voltage conditions and different load currents I_O.

In one embodiment of the present invention, the ON time duration of the main power switch S₁consists of a basic time duration, a THD compensate time duration and a PF compensate time duration. Specifically, the ON time duration of the main power switch S1 consists of a sum of the basic time duration T_B, a product of the THD compensate time duration T_THDand a first coefficient k₁, and a product of the PF compensate time duration T_PFand a second coefficient k₂. The basic time duration T_Bis determined by a peak value of the AC input voltage V_acand the load current I_O. For example, the basic time duration T_Bhas a functional relationship with the peak value of the AC input voltage V_acand the load current I_O. The THD compensate time duration and the PF compensate time duration both vary with an instantaneous value of the AC input voltage V_ac. For example, the THD compensate time duration and the PF compensate time duration both have a functional relationship with the instantaneous value of the AC input voltage. The first coefficient k₁and the second coefficient k₁both varies with a root-mean-square (RMS) value of the AC input voltage V_acand the load current I_O. When the RMS value of the AC input voltage V_acis higher than a high voltage threshold and the load current I_Ois higher than a high current threshold, the first coefficient k₁has a first compensate value k₁₁, and the second coefficient k₂has a first trim value k₂₁. When the RMS value of the AC input voltage V_acis higher than the high voltage threshold and the load current I_Ois lower than a low current threshold, the first coefficient k₁has a second compensate value k₁₂, and the second coefficient k₂has a second trim value k₂₂. When the RMS value of the AC input voltage V_acis lower than a low voltage threshold and the load current I_Ois higher than the high current threshold, the first coefficient k₁has a third compensate value k₁₃, and the second coefficient k₂has a third trim value k₂₃. When the RMS value of the AC input voltage V_acis lower than the low voltage threshold and the load current I_Ois lower than the low current threshold, the first coefficient k₁has a fourth compensate value k₁₄, and the second coefficient k₂has a fourth trim value k₂₄.

The relationship of the first coefficient k₁vs. the AC input voltage V_ac& the load condition is shown in below table 1.

TABLE 1

k₁
relatively high V_ac
relatively low V_ac

heavy load
k₁₁
k₁₃

light load
k₁₂
k₁₄

The relationship of the second coefficient k₂vs. the AC input voltage V_ac& the load condition is shown in below table 2.

TABLE 2

K₂
relatively high V_ac
relatively low V_ac

heavy load
K₂₁
K₂₃

light load
K₂₂
K₂₄

In one embodiment of the present invention, a real-time value T_B(t)of the basic time duration T_Bhas a functional relationship with the peak value of the AC input voltage V_acand the load current I_Oas below:

T
B

(
t
)

=

k
×

I
O

(
t
)

V

ac
⁢
_
⁢
pk

2

Wherein k is a set coefficient, I_O(t)represents a real-time value of the load current, and V_{ac_pk}represents the peak value of the AC input voltage.

FIG. 2 schematically shows a circuit configuration of the controller 102 in accordance with an embodiment of the present invention. In the example of FIG. 2, the controller 102 comprises: a proportional integral circuit PI, a basic ON time duration unit 21, a THD compensate circuit 22, a PF compensate circuit 23, and a logical unit 24. The proportional integral circuit PI is configured to generate a proportional integral signal V_CMPin response to a feedback voltage V_FBindicative of the output voltage V_Oand an internal voltage reference. The basic ON time duration unit 21 is configured to generate a basic signal S_TBin response to the peak value of the AC input voltage V_acand the proportional integral signal V_CMP. The THD compensate circuit 22 is configured to obtain the THD compensate signal S_THDand the first coefficient k₁in response to the AC input voltage V_acand the proportional integral signal V_CMP, to generate the product (S_THD*K₁) of the THD compensate signal S_THDand the first coefficient k₁. The PF compensate circuit 23 is configured to obtain the PF compensate signal S_PFand the second coefficient k₂in response to the AC input voltage V_acand the proportional integral signal V_CMP, to generate the product (S_PF*K₂) of the PF compensate signal S_PFand the second coefficient k₂. The logical unit 24 is configured to generate the control signal G_SWin response to the basic signal S_TB, the product (S_THD*K₁) of the THD compensate signal S_THDand the first coefficient k₁, and the product (S_PF*K₂) of the PF compensate signal S_PFand the second coefficient k₂, to control the main power switch S1.

In one embodiment of the present invention, the control circuit 102 further comprises a summing circuit, configured to perform an add operation on the basic signal S_TB, the product (S_THD*K₁) of the THD compensate signal S_THDand the first coefficient k₁, and the product (S_PF*K₂) of the PF compensate signal S_PFand the second coefficient k₂, to generate the ON time signal S_ON, which is then delivered to the logical unit 24. Accordingly, the control signal G_SWis generated.

In one embodiment of the present invention, an effective time duration (e.g., the time duration of the logical high level) of the basic signal S_TBis T_Bin one switching cycle. An effective time duration (e.g., the time duration of the logical high level) of the THD compensate signal S_THDis T_THDin one switching cycle. An effective time duration (e.g., the time duration of the logical high level) of the PF compensate signal S_PFis T_PFin one switching cycle.

In one embodiment of the present invention, the THD compensate circuit 22 comprises: a THD unit 221, a first coefficient unit 222, and a first multiplication unit 223. The THD unit 221 is configured to generate the THD compensate signal S_THDin response to the AC input voltage V_ac. The effective time duration of the THD compensate signal S_THDvaries with the instantaneous value of the AC input voltage V_ac. The first coefficient unit 222 is configured to judge whether the RMS of the AC input voltage V_acis a high voltage or a low voltage, and judge whether the load current is high or low, to generate the first coefficient k₁with a corresponding compensate value. For example, the RMS of the AC input voltage V_acmay be compared with the high voltage threshold or the low voltage threshold, to detect the AC input voltage V_accondition; and the proportional integral signal V_CMPmay be compared with the high current threshold or the low current threshold, to detect the load condition. The first multiplication unit 223 is configured to perform a multiply operation on the THD compensate signal S_THDand the first coefficient k₁, to generate the product (S_THD*K₁) of the THD compensate signal S_THDand the first coefficient k₁.

In one embodiment of the present invention, the PF compensate circuit 23 comprises: a PF unit 231, a second coefficient unit 232, and a second multiplication unit 233. The PF unit 231 is configured to generate the PF compensate signal S_PFin response to the AC input voltage V_ac. The effective time duration of the PF compensate signal varies with the instantaneous value of the AC input voltage V_ac. The second coefficient unit 232 is configured to judge whether the RMS of the AC input voltage V_acis a high voltage or a low voltage, and judge whether the load current is high or low, to generate the second coefficient k₂with a corresponding trim value. The second multiplication unit 233 is configured to perform a multiply operation on the PF compensate signal S_PFand the second coefficient k₂, to generate the product (S_PF*K₂) of the PF compensate signal S_PFand the second coefficient k₂.

In one embodiment of the present invention, the power stage circuit 101 further comprises a freewheeling power switch (as shown in FIG. 3), configured to free wheel the current when the main power switch is OFF. The logical unit 24 is further configured to receive a zero crossing information of the current flowing through the freewheeling power switch, to control the main power switch.

FIG. 3 schematically shows a switching regulator 300 with a circuit configuration of the power stage 101 in accordance with an embodiment of the present invention. In the example of FIG. 3, the power stage 101 comprises a boost circuit, having an input inductor, the main power switch S1, a freewheeling power switch and an output capacitor. The control circuit 102 is configured to receive the AC input voltage V_acvia a first diode D₁and a second diode D₂, and is configured to receive the feedback voltage V_FBvia a resistor divider, to generate the control signal G_SW, which is used to control the main power switch S1 to have different ON time durations under different AC input voltage conditions and different load currents.

FIG. 4 schematically shows a flowchart 400 of a method used in a switching regulator in accordance with an embodiment of the present invention. The switching regulator includes a power stage having a main power switch. The main power switch is periodically controlled to be turned on and off. The method comprises:

Step 401, converting an AC input voltage to an output voltage, to provide power a load.

Step 402, adjusting an ON time duration of the main power switch in response to the AC input voltage and a load current, the ON time duration of the main power switch consisting of a basic time duration, a product of a THD compensate time duration and a first coefficient, and a product of a PF compensate time duration and a second coefficient. And

Step 403: setting the first coefficient and the second coefficient to be different values when the AC input voltage and the load current are in different conditions.

In one embodiment, the first coefficient is set to be a first compensate value and the second coefficient is set to be a first trim value, when a root-mean-square (RMS) value of the AC input voltage is higher than a high voltage threshold and the load current is higher than a high current threshold. The first coefficient is set to be a second compensate value and the second coefficient is set to be a second trim value, when the RMS value of the AC input voltage is higher than the high voltage threshold and the load current is lower than a low current threshold. The first coefficient is set to be a third compensate value and the second coefficient is set to be a third trim value, when the RMS value of the AC input voltage is lower than a low voltage threshold and the load current is higher than the high current threshold. The first coefficient is set to be a fourth compensate value and the second coefficient is set to be a fourth trim value, when the RMS value of the AC input voltage is lower than the low voltage threshold and the load current is lower than the low current threshold.

In one embodiment of the present invention, the basic time duration is determined by the load current and a peak value of the AC input voltage.

In one embodiment of the present invention, the THD compensate time duration and the PF compensate time duration both vary with an instantaneous value of the AC input voltage.

Several embodiments of the foregoing switching regulator set different effective THD compensate time durations and different effective PF compensate time durations, to adjust the ON time duration of the main power switch under different instantaneous values of the AC input voltage and different load currents. Thus, power factor and total harmonic distortion are optimized.

It is to be understood in these letters patent that the meaning of “A” is coupled to “B” is that either A and B are connected to each other as described below, or that, although A and B may not be connected to each other as described above, there is nevertheless a device or circuit that is connected to both A and B. This device or circuit may include active or passive circuit elements, where the passive circuit elements may be distributed or lumped-parameter in nature. For example, A may be connected to a circuit element that in turn is connected to B.

This written description uses examples to disclose the invention, including the best mode, and also to enable a person skilled in the art to make and use the invention. The patentable scope of the invention may include other examples that occur to those skilled in the art.