BACKGROUND

1. Technical Field

The disclosed embodiments relate to devices and methods for voltage compensation.

2. Description of Related Art

As the rhythm of an audio signal changes the power drawn by the audio device varies. As known in the art, when the audio signal has a first characteristic, for example unaccented part of the audio signal, the audio device may consume less electric energy. When the audio signal has a second characteristic, for example a climax or accented part of the audio signal, the audio device may consume more electric energy.

As the supply voltage decreases and the audio signal has the second characteristic, the supply voltage may be not enough to power the audio device.

Therefore there is room for improvement in the art.

BRIEF DESCRIPTION OF THE DRAWINGS

Many aspects of the embodiments can be better understood with reference to the following drawings. The components in the drawings are not necessarily drawn to scale, the emphasis instead being placed upon clearly illustrating the principles of the present embodiments. Moreover, in the drawings, like reference numerals designate corresponding parts throughout the views.

FIG. 1 is a block diagram of an electronic apparatus in accordance with an exemplary embodiment.

FIG. 2 is a circuit diagram of the electronic apparatus of FIG. 1 in accordance with the exemplary embodiment.

FIG. 3 illustrates a method for compensating a supply voltage from a power supply in accordance with the exemplary embodiment.

DETAILED DESCRIPTION

Referring to FIG. 1, an electronic apparatus 100 includes a power supply 10, a compensating device 20, and an audio device 30. The power supply 10 includes a first terminal 12 for providing an input voltage and a second terminal 14 for providing a supply voltage.

The compensating device 20 includes a detecting circuit 22 and a storing circuit 24. The detecting circuit 22 connects the power supply 10 and the audio device 30. The detecting circuit 22 is used for receiving the supply voltage and detecting an audio signal from the audio device 30, generating a first level signal when detecting that the audio signal has a first characteristic, for example unaccented part of the audio signal; and generating a second level signal when detecting that the audio signal has a second characteristic, for example a climax or accented part of the audio signal.

In detail, the detecting circuit 22 detects the audio signal to generate a detecting voltage. The detecting circuit 22 further compares the detecting voltage with a reference voltage, when the detecting voltage is smaller than the reference voltage, the first characteristic is determined; when the detecting voltage is larger than the reference voltage, the second characteristic is determined.

The storing circuit 24 is connected to the power supply 10 and the detecting circuit 22. The storing circuit 24 is used for receiving the input voltage, storing energy according to the first level signal, and releasing energy to increase the supply voltage according to the second level signal. As the supply voltage from the power supply 10 decreases and the audio signal has a second characteristic, because the storing circuit 24 releases energy to increase the supply voltage, so the increased supply voltage is enough to power the audio device 30.

Referring to FIG. 2, the detecting circuit 22 includes a control unit U1, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a first capacitor C1, and a transistor Q1. The control unit U1 includes an input pin 30 and an output pin 32. One end of the first resistor R1 is coupled to the second terminal 14 (for clarity and simplicity, the connection from the second terminal 14 to a node within the broken line boxes is shown as Vcc) of the power supply 10, the other end of the first resistor R1 is grounded through the second resistor R2. The audio device 30 is connected between the first resistor R1 and the second resistor R2. A base of the first transistor Q1 is coupled between the first resistor R1 and the second resistor R2, a collector of the first transistor Q1 is connected to the second terminal 14 through the third resistor R3, an emitter of the first transistor Q1 is grounded through the fourth resistor R4. One end of the first capacitor C1 connects the collector of first transistor Q1, the other end of the first capacitor C1 connects the input pin 30. One end of the fifth resistor R5 is coupled between the first capacitor C1 and the input pin 30, the other end of the fifth resistor R5 is grounded.

The storing circuit 24 includes a second transistor Q2, a second capacitor C2, an operating amplifier U2, a diode D1, a sixth resistor R6, a seventh resistor R7, a eighth resistor R8, a ninth resistor R9, and a tenth resistor R10. An emitter of the second transistor Q2 connects the second terminal 14 of the power supply 10, a base of the second transistor Q2 connects the output pin 32 of the control unit U1, a collector of the second transistor Q2 connects an anode of the diode D1 through the tenth resistor R10. One end of the second capacitor C2 connects a cathode of the diode D1, the other end of the second capacitor C2 is grounded. In this embodiment, the resistance of the sixth resistor R6 is equal to the resistance of the seventh resistor R7, the resistance of the eighth resistor R8 is equal to the resistance of the ninth resistor R9.

The operating amplifier U2 includes a non-inverted input terminal 40, an inverted input terminal 42, and an output terminal 44. One end of the sixth resistor R6 connects the first terminal 12 of the power supply 10, the other end of the sixth resistor R6 connects the non-inverted input terminal 40. One end of the seventh resistor R7 connects the non-inverted input terminal 40, the other end of the seventh resistor R7 is connected between the cathode of the diode D1 and the second capacitor C2. The eighth resistor R8 is connected between the inverted input terminal 42 and ground. The ninth resistor R9 is connected between the inverted input terminal 42 and the output terminal 44. The output terminal 44 connects the second terminal 14 of the power supply 10.

The principle of the electronic apparatus 100 is illustrated as follows: when the electronic apparatus 100 is powered on, the second capacitor C2 does not store any electric energy, thus the voltage across the second capacitor C2 is equal to zero, Vc2=0V. The voltage of the non-inverted input terminal 40 is illustrated by following formula:

$\frac{V î¢ž î¢ž 1 - V_{40}}{R î¢ž î¢ž 6} = \frac{V_{40}}{R î¢ž î¢ž 7},$

wherein V₄₀is the voltage of the non-inverted input terminal 40.

Because the resistance of the sixth resistor R6 is equal to the resistance of the seventh resistor R7, V1=2V₄₀. The voltage of the inverted input terminal 42 is illustrated by following formula:

$\frac{Vcc - V_{42}}{R î¢ž î¢ž 9} = \frac{V_{42}}{R î¢ž î¢ž 8},$

wherein V₄₂is the voltage of the inverted input terminal 42. Because the resistance of the eighth resistor R8 is equal to the resistance of the ninth resistor R9 and the voltage of the inverted input terminal 42 is equal to the voltage of the non-inverted input terminal 40, Vcc=2V₄₂=2V₄₀=V1.

The current I1 of the audio signal is supplied to the base of the first transistor Q1, the first transistor Q1 amplifies the current I1 to the current I2, wherein I2=Î²I1 and Î² is the gain of the first transistor Q1. The input pin 30 of the control unit U1 receives the detecting voltage Vd, Vd=Î²I1Ã—R1. The control unit U1 further presets the reference voltage, when the detecting voltage is smaller than the reference voltage, the control unit U1 generates a first level signal. When the detecting voltage is larger than the reference voltage, the control unit U1 generates a second level signal.

When the first level signal is supplied to the base of the second transistor Q2, the second transistor Q2 is turned on. The supply voltage Vcc charges up the second capacitor C2, so the voltage across the second capacitor C2 is Va. When the second level signal is supplied to the base of the second transistor Q2, the second transistor Q2 is turned off, and the voltage of the non-inverted input terminal 40 is illustrated by following formula:

$\frac{V î¢ž î¢ž 1 - V_{40}}{R î¢ž î¢ž 6} = \frac{V_{40} - Va}{R î¢ž î¢ž 7}, î¢ž 2 î¢ž V_{40} = V î¢ž î¢ž 1 + Va .$

The voltage of the inverted input terminal 42 is illustrated by following formula:

$\frac{Vcc - V_{42}}{R î¢ž î¢ž 9} = \frac{V_{42}}{R î¢ž î¢ž 8}, î¢ž 2 î¢ž V_{42} = Vcc; î¢ž Vcc = 2 î¢ž V_{42} = 2 î¢ž V_{40} = V î¢ž î¢ž 1 + Va .$

Therefore, when the audio signal has a second characteristic, the supply voltage Vcc is increased, and the increased supply voltage is enough to power the audio device 30.

Referring to FIG. 3, a method for compensating a supply voltage from a power supply 10 is illustrated.

In step 302, the detecting circuit 22 detects an audio signal to generate a detecting voltage.

In step 304, the detecting circuit 22 further compares the detecting voltage with a reference voltage to determine whether the detecting voltage is smaller than the reference voltage.

In step 306, if the detecting voltage is smaller than the reference voltage, that is, the first characteristic of the audio signal is determined, the storing circuit 24 stores energy.

In step 308, if the detecting voltage is larger than the reference voltage, that is, the second characteristic of the audio signal is determined, the storing circuit 24 releases energy to increase the supply voltage. Therefore, the increased supply voltage is enough to power the audio device 30.

Further alternative embodiments will become apparent to those skilled in the art without departing from the spirit and scope of what is claimed. Accordingly, the present invention should be deemed not to be limited to the above detailed description, but rather only by the claims that follow and equivalents thereof.