The first input voltage VIN255 may be buffered by an uppermost gamma buffer GAM BUF and may then be applied to an uppermost tap node TAB, and thus, may be a tap gamma voltage VGAM [255] having a highest gray level. The second input voltage VIN0 may be buffered by a lowermost gamma buffer GAM BUF and may then be applied to a lowermost tap node TAB, and thus, may be a tap gamma voltage VGAM [0] having a lowest gray level.

When a level of the first input voltage VIN255 and a level of the second input voltage VIN0 are shifted, levels of the 0 to 255 gamma compensation voltages VGAM [0] to VGAM [255] may be shifted.

In a display apparatus having a high resolution and a high frequency, because a time margin of a gamma output is small, a time for which the gamma output is settled to a target voltage should be short. To this end, an output response time of a gamma voltage generating circuit should be fast.

A method of decreasing an internal load resistance level of the gamma voltage generating circuit may be considered for improving the output response time of the gamma voltage generating circuit. FIG. 5 illustrates a flow of an internal current of the gamma voltage generating circuit when an internal resistance load of a resistor string is reduced. When load resistance levels of resistor strings are reduced, levels of currents I1, I2, . . . , and I9 flowing in the resistor strings may increase, the increased currents I1, I2, . . . , and I9 may concentrate on an output terminal of the lowermost gamma buffer GAM BUF. As a result, when a sum of concentrated currents is greater than an available level defined in a gamma buffer, the lowermost gamma buffer GAM BUF may abnormally operate.

Such a reason is because there is a limitation in reducing load resistance levels of gamma strings in the gamma voltage generating circuit having a structure illustrated in FIG. 4, a gamma output settling time may increase. For example, in the gamma voltage generating circuit according to the comparative example, tap gamma voltages may be charged in tap nodes in the order of {circle around (1)} _{circle around (2)}_{circle around (3)}_. . ._{circle around (8)}_{circle around (9)} as in FIG. 6, and tap gamma voltages may be settled in the same order, based on output variations of R_G_B. As a result, because a charging order of tap gamma voltages in the gamma voltage generating circuit according to the comparative example is sequentially determined in this order from a voltage of an upper end to a voltage of a lower end, there may be a problem where an output settling time Y of the gamma voltage generating circuit increases as in FIG. 7.

To decrease an output settling time of the gamma voltage generating circuit, the use of a large-capacity gamma buffer having good driving capability may be needed. However, there may be a drawback where a circuit size of the gamma voltage generating circuit increases.

FIGS. 8 and 9 are diagrams illustrating a gamma voltage generating circuit 408-1 according to a first embodiment. FIG. 10 is a diagram illustrating a flow of an internal current when an internal resistance load is reduced, in the gamma voltage generating circuit 408-1 according to the first embodiment. FIGS. 11 and 12 are diagrams showing a gamma voltage determination order and an output settling time based thereon in the gamma voltage generating circuit 408-1 according to the first embodiment. FIG. 13 is a diagram illustrating an example where an output settling time is more reduced in the first embodiment than the comparative example.

Referring to FIGS. 8 and 9, comparing with the comparative example described above, the gamma voltage generating circuit 408-1 according to the first embodiment may have a largest difference in connection structure between a plurality of resistor strings R String 1 to 8.

Each of the plurality of resistor strings R String 1 to 8 may include a first connection portion coupled to a tap gamma output of a first gray level and a second connection portion coupled to a tap gamma output of a second gray level which is lower than the first gray level, and the second connection portions of the plurality of resistor strings R String 1 to 8 may be distributed and connected to output terminals of two or more gamma buffers.

Based on a connection configuration of the resistor strings R String 1 to 8, currents I1 to I8 flowing in the resistor strings R String 1 to 8 may not concentrate on an output terminal of one gamma buffer and may be distributed to output terminals of two or more gamma buffers as in FIG. 10.

Therefore, because load resistance levels of the resistor strings R String 1 to 8 decrease, even when levels of the currents I1 to I8 flowing in the resistor strings R String 1 to 8 increase, the increased currents I1 to I8 may not concentrate on only an output terminal of a lowermost gamma buffer GB0 and may be distributed to output terminals of the other gamma buffers, and thus, an abnormal operation of a gamma buffer caused by an overcurrent may be prevented.

The gamma voltage generating circuit 408-1 according to the first embodiment may decrease load resistance levels of the resistor strings R String 1 to 8 with no problem of an abnormal operation caused by an overcurrent, and thus, may not need to use a large-capacity gamma buffer which causes an increase in circuit size. On the other hand, because the load resistance levels of the resistor strings R String 1 to 8 are reduced, it may be possible to decrease a level of a gamma buffer. As a result, the gamma voltage generating circuit 408-1 according to the first embodiment may implement a fast response time in small-size products such as augmented reality (AR) or virtual reality (VR) requiring the use of a high resolution and a high frequency and may effectively improve the performance of a display apparatus.

Referring to FIGS. 8 and 9, the gamma voltage generating circuit 408-1 according to the first embodiment may include a plurality of tap nodes TAB0, TAB5, TAB10, TAB21, TAB40, TAB65, TAB99, TAB144, TAB190, and TAB255, a plurality of resistor strings R String 1 to 8 connected between two tap nodes, and a plurality of gamma buffers GB0, GB5, GB10, GB21, GB40, GB65, GB99, GB144, GB190, and GB255 which generate a plurality of tap gamma voltages VGAM[0], VGAM[5], VGAM[10], VGAM[21], VGAM[40], VGAM[65], VGAM[99], VGAM[144], VGAM[190], and VGAM[255] to output to the plurality of tap nodes, based on voltage division results of the plurality of resistor strings R String 1 to 8.

Some of the 0 to 255 gamma compensation voltages VGAM [0] to VGAM [255] may be a plurality of tap gamma voltages VGAM[0], VGAM[5], VGAM[10], VGAM[21], VGAM[40], VGAM[65], VGAM[99], VGAM[144], VGAM[190], and VGAM[255]. The number of tap gamma voltages VGAM[0], VGAM[5], VGAM[10], VGAM[21], VGAM[40], VGAM[65], VGAM[99], VGAM[144], VGAM[190], and VGAM[255] may be 10. A tap gamma voltage may be referred to as a gamma reference voltage. Also, the other gamma compensation voltages except the tap gamma voltages may be voltages obtained through voltage division by a tap resistor RTAB connected between adjacent tap nodes TAB.

A first input voltage VIN255 may be buffered by an uppermost gamma buffer GB255 and may then be applied to an uppermost tap node TAB255, and thus, may be a tap gamma voltage VGAM [255] having a highest gray level. A second input voltage VIN0 may be buffered by a lowermost gamma buffer GB0 and may then be applied to a lowermost tap node TAB0, and thus, may be a tap gamma voltage VGAM [0] having a lowest gray level.

When a level of the first input voltage VIN255 and a level of the second input voltage VIN0 are shifted, levels of the 0 to 255 gamma compensation voltages VGAM [0] to VGAM [255] may be shifted.

A first resistor string R String 1 may include a first connection portion coupled to a tap gamma output VGAM[255] of a 255 gray level and a second connection portion coupled to a tap gamma output VGAM[0] of a 0 gray level. One of voltage division results of the first resistor string R String 1 may be a tap gamma output VGAM[190] of a 190 gray level and may be charged in the tap node TAB190 through a multiplexer MUX and a gamma buffer GB190.

A second resistor string R String 2 may include a first connection portion coupled to a tap gamma output VGAM[190] of a 190 gray level and a second connection portion coupled to the tap gamma output VGAM[0] of a 0 gray level. One of voltage division results of the first resistor string R String 2 may be a tap gamma output VGAM[5] of a 5 gray level and may be charged in the tap node TAB5 through the multiplexer MUX and a gamma buffer GB5.

A third resistor string R String 3 may include a first connection portion coupled to the tap gamma output VGAM[190] of a 190 gray level and a second connection portion coupled to the tap gamma output VGAM[5] of a 5 gray level. One of voltage division results of the third resistor string R String 3 may be a tap gamma output VGAM[144] of a 144 gray level and may be charged in the tap node TAB144 through the multiplexer MUX and a gamma buffer GB144.

A fourth resistor string R String 4 may include a first connection portion coupled to the tap gamma output VGAM[144] of a 144 gray level and a second connection portion coupled to the tap gamma output VGAM[5] of a 5 gray level. One of voltage division results of the fourth resistor string R String 4 may be a tap gamma output VGAM[10] of a 10 gray level and may be charged in the tap node TAB10 through the multiplexer MUX and a gamma buffer GB10.

A fifth resistor string R String 5 may include a first connection portion coupled to the tap gamma output VGAM[144] of a 144 gray level and a second connection portion coupled to the tap gamma output VGAM[10] of a 10 gray level. One of voltage division results of the fifth resistor string R String 5 may be a tap gamma output VGAM[99] of a 99 gray level and may be charged in the tap node TAB99 through the multiplexer MUX and a gamma buffer GB99.

A sixth resistor string R String 6 may include a first connection portion coupled to the tap gamma output VGAM[99] of a 99 gray level and a second connection portion coupled to the tap gamma output VGAM[10] of a 10 gray level. One of voltage division results of the sixth resistor string R String 6 may be a tap gamma output VGAM[21] of a 21 gray level and may be charged in the tap node TAB21 through the multiplexer MUX and a gamma buffer GB21.

A seventh resistor string R String 7 may include a first connection portion coupled to the tap gamma output VGAM[99] of a 99 gray level and a second connection portion coupled to the tap gamma output VGAM[21] of a 21 gray level. One of voltage division results of the seventh resistor string R String 7 may be a tap gamma output VGAM[65] of a 65 gray level and may be charged in the tap node TAB65 through the multiplexer MUX and a gamma buffer GB65.

An eighth resistor string R String 8 may include a first connection portion coupled to the tap gamma output VGAM[65] of a 65 gray level and a second connection portion coupled to the tap gamma output VGAM[21] of a 21 gray level. One of voltage division results of the eighth resistor string R String 8 may be a tap gamma output VGAM[40] of a 40 gray level and may be charged in the tap node TAB40 through the multiplexer MUX and a gamma buffer GB40.

The plurality of tap gamma voltages VGAM[0], VGAM[5], VGAM[10], VGAM[21], VGAM[40], VGAM[65], VGAM[99], VGAM[144], VGAM[190], and VGAM[255] may include a tap gamma voltage VGAM[255] of a highest gray level, a tap gamma voltage VGAM[0] of a lowest gray level, and tap gamma voltages VGAM[5], VGAM[10], VGAM[21], VGAM[40], VGAM[65], VGAM[99], VGAM[144], and VGAM[190] of the other gray levels between the highest gray level and the lowest gray level. Also, the tap gamma voltages VGAM[5], VGAM[10], VGAM[21], VGAM[40], VGAM[65], VGAM[99], VGAM[144], and VGAM[190] of the other gray levels may include a tap gamma voltage VGAM[190] of a second-high gray level, a tap gamma voltage VGAM[5] of a second-low gray level, and tap gamma voltages VGAM[10], VGAM[21], VGAM[40], VGAM[65], VGAM[99], and VGAM[144] of middle gray levels between the second-high gray level and the second-low gray level.

In this case, in a charging order of a plurality of tap gamma voltages on a plurality of tap nodes, as in FIG. 11, the tap gamma voltage VGAM[255] of a highest gray level and the tap gamma voltage VGAM[0] of a lowest gray level may be first in order, and at least one tap gamma voltage VGAM[40] of the tap gamma voltages VGAM[10], VGAM[21], VGAM[40], VGAM[65], VGAM[99], and VGAM[144] of middle gray levels may be latest in order.

Based on such a connection configuration, the number of resistor strings R String 1 to 8 may be equal to the number of tap gamma voltages VGAM[5], VGAM[10], VGAM[21], VGAM[40], VGAM[65], VGAM[99], VGAM[144], and VGAM[190] of the other gray levels. Also, an input terminal of each of the other gamma buffers GB5, GB10, GB21, GB40, GB65, GB99, GB144, and GB190 generating the tap gamma voltages VGAM[5], VGAM[10], VGAM[21], VGAM[40], VGAM[65], VGAM[99], VGAM[144], and VGAM[190] of the other gray levels may be connected to one resistor string through the multiplexer MUX.

Currents I1 to I