280. The membrane 290 may also be referred to as a diaphragm or a back plate.

Many variations and/or modifications can be made to embodiments of the disclosure. In some other embodiments, the isolation layer 240 and/or the isolation layer 280 are not formed. The membrane 290 may be a single layer, which is similar to or the same as the membrane 150. In addition, although figures show that the membrane 150 is a single layer, embodiments of the disclosure are not limited thereto. In some other embodiments, the membrane 150 is a composite or multi-layer structure, which is similar to or the same as the membrane 290.

As shown in FIG. 2H, the membrane 290 includes multiple movable (flexible) features 300, in accordance with some embodiments. The dielectric layer 210 will be partially removed (or released) in subsequent processes so that the movable features 300 are suspended. It allows the membrane 290 and the movable features 300 to have free movement in at least one axis to achieve mechanical functionality. For example, the movable features 300 are capable of bending, vibrating, and/or deforming.

Many variations and/or modifications can be made to embodiments of the disclosure. In some other embodiments, the membrane 290 does not include the movable features 300. The configuration of the membrane 290 may be similar to or the same as the configuration of the membrane 150. In addition, although figures show that the membrane 150 does not include multiple movable features, embodiments of the disclosure are not limited thereto. In some other embodiments, the membrane 150 includes multiple movable features, which is similar to or the same as the movable features 300.

As shown in FIG. 2H, the membrane 290 further includes multiple recessed portions 310 and 320, in accordance with some embodiments. The recessed portions 310 and 320 downwardly protrude from the top surface 210A of the dielectric layer 210 and extend in the dielectric layer 210 towards the membrane 150. The recessed portions 310 and 320 correspond to the openings 220 and the recesses 230 in the dielectric layer 210, respectively. The recessed portions 310 and 320 are integrated with each other.

Due to the recessed portions 310, the top surface 290A of the membrane 290 has dimples. The recessed portions 310 may be V-shaped or another shape. Due to the recessed portions 320, the top surface 290A of the membrane 290 has depressions which are much larger than dimples, as shown in FIG. 2H. The depressions, which correspond to the recessed portions 320, form a concave corrugation on the top surface 290A of the membrane 290, which will be described in more detail later. The depressions on the top surface 290A have similar or substantially the same topography as the recessed portions 230.

In some embodiments, the length L₂of the recessed portions 320 is in a range from about 5 μm to about 100 μm. The length L₂of the recessed portions 320 may be substantially equal to the length L₁of the recessed portions 170. However, embodiments of the disclosure are not limited. The length L₂may be greater or less than the length L₁.

In some embodiments, some portions of the membrane material 260 are left over the top surface of the isolation layer 240 and form multiple conductive features 330. The conductive features 330 are electrically connected to the conductive features 190 and/or the membrane 150 through the conductive vias 270.

As shown in FIG. 2I, a dielectric layer 340 is deposited over the dielectric layer 210 and covers the membrane 290 and the conductive features 330, in accordance with some embodiments. Afterwards, the dielectric layer 340 is partially removed to form multiple openings 350, as shown in FIG. 2I. The openings 350 penetrate through the dielectric layer 340 and extend in the membrane 290. As a result, the membrane 290 and the conductive features 330 are partially exposed through the openings 350.

In some embodiments, the dielectric layer 340 includes or is made of silicon oxide, another suitable oxide or dielectric material, or a combination thereof. The dielectric layer 340 may include the same material as the dielectric layer 110, but embodiments of the disclosure are not limited thereto.

A patterned conductive layer 360 is formed over the dielectric layer 340 and extends in the openings 350 to electrically connect to the membrane 290 and the conductive features 330. In some embodiments, one of the openings 350 extends to the recessed portions 320 of the membrane 290. The conductive layer 360 may be in direct contact with the recessed portions 320. Subsequently, a protection layer 370 is deposited over the dielectric layer 340 to cover the conductive layer 360. The protection layer 370 includes a suitable dielectric material.

As shown in FIG. 2J, the semiconductor substrate 100 is partially removed, in accordance with some embodiments. As a result, a cavity 380 is formed in the semiconductor substrate 100. The semiconductor substrate 100 is partially removed using a dry etching process or a wet etching process.

Afterwards, the dielectric layer 110, the dielectric layer 210 and the dielectric layer 340 are partially removed (or released), as mentioned above. As a result, the membrane 150 and the membrane 290 are partially exposed through a cavity 390 and suspended in the cavity 390. The cavity 390 penetrates through the dielectric layer 110, the dielectric layer 210 and the dielectric layer 340. The dielectric layer 110, the dielectric layer 210 and/or the dielectric layer 340 are partially removed using a dry etching process or a wet etching process. In addition, the protection layer 370 is partially removed to partially expose the membrane 150 and the membrane 290 in the cavity 390 and the conductive layer 360.

In accordance with some embodiments, the cavity 390 is created for the membrane 150 and the membrane 290 to have free movement. Accordingly, a semiconductor device structure including MEMS elements is formed, as shown in FIGS. 1 and 2J.

More specifically, the recessed portions 160 of the membrane 150 and the recessed portions 310 of the membrane 290 are exposed through the cavity 390, as shown in FIG. 2J in accordance with some embodiments. The recessed portions 170 of the membrane 150 are partially exposed through the cavity 390 and partially embedded between the dielectric layer 110 and the dielectric layer 210. The recessed portions 320 of the membrane 290 are partially exposed through the cavity 390 and partially embedded between the dielectric layer 210 and the dielectric layer 340. The membrane 150 and the membrane 290 are firmly anchored into the dielectric layers 110, 210 and 340 through the recessed portions 170 and the recessed portions 320.

The recessed portions 170 and the recessed portions 320 have a length L₃in the dielectric layer 110, as shown in FIG. 2J. In some embodiments, the length L₃is in a range from about 0.1 μm to about 30 μm.

Many variations and/or modifications can be made to embodiments of the disclosure. In some other embodiments, the recessed portions 170 are exposed through the cavity 390 without being partially embedded between the dielectric layer 110 and the dielectric layer 210. In some other embodiments, the recessed portions 320 are exposed through the cavity 390 without being partially embedded between the dielectric layer 210 and the dielectric layer 340.

As shown in FIGS. 1 and 2J, the dielectric layer 110 overlaps the semiconductor substrate 100. The cavity 390 in the dielectric layer 110 is larger than the cavity 380 of the semiconductor substrate 100 so the semiconductor substrate 100 is partially exposed from the cavity 390.

The membrane 150 overlaps the cavity 380 and the cavity 390. Since the membrane 150 is larger than the cavity 380 and the cavity 390 so the membrane 150 further partially overlaps the dielectric layer 110 and the semiconductor substrate 100. In some embodiments, the cavity 380 and the cavity 390 are circular or circle-like. In some embodiments, the membrane 150 is circular or circle-like. However, embodiments of the disclosure are not limited thereto. In some embodiments, the diameter D₅of the membrane 150 is in a range from about 100 μm to about 10 mm.

As shown in FIG. 1, the recessed portions 160 and 170 of the membrane 150 are illustrated as dashed lines for a better understanding of the structure. In some embodiments, the recessed portions 160 are positioned at the center region of the membrane 150, as shown in FIG. 1. The recessed portions 160 are within the cavity 390 without overlapping the semiconductor substrate 100. The recessed portions 160 are distributed around the center 400 of the membrane 150. The recessed portions 160 may be arranged in circles, which are spaced apart from the center 400 with different distances. However, embodiments of the disclosure are not limited. The recessed portions 160 may have another suitable arrangement.

In some embodiments, the recessed portions 170 are positioned at the peripheral region of the membrane 150, as shown in FIG. 1. The recessed portions 160 are surrounded by the recessed portions 170. The recessed portions 170 extend in the cavity 390 and partially overlap the semiconductor substrate 100. In some embodiments, the recessed portions 170 further stretch outside of the cavity 390. Accordingly, the recessed portions 170 further partially overlap the dielectric layer 110. The recessed portions 170 extend along a direction intersecting the edge 390A of the cavity 390.

However, embodiments of the disclosure are not limited. In some other embodiments, the recessed portions 170 are within the cavity 390 without overlapping the dielectric layer 110. In some embodiments, the recessed portions 170 do not reach the edge of the membrane 150, as shown in FIG. 1.

In some embodiments, the length L₁of the recessed portions 170 is in a range from about 5 μm to about 100 μm. These recessed portions 170 may have substantially the same length L₁. The length L₁may be varied according to the diameter D₅of the membrane 150.

The recessed portions 170 include an inner width W₁and an outer width W₂. In some embodiments, the inner width W₁is in a range from about 0.3 μm to about 10 μm. In some embodiments, the outer width W₂is in a range from about 0.3 μm to about 10 μm. In some embodiments, the inner width W₁is substantially equal to the outer width W₂, as shown in FIG. 1. Accordingly, the recessed portions 170 are rectangular. These recessed portions 170 may have substantially the same inner width W₁. These recessed portions 170 may have substantially the same outer width W₂.

The recessed portions 170 include an inner interval (or pitch) P₁and an outer interval P₂. In some embodiments, the inner interval P₁is in a range from about 3 μm to about 100 μm. In some embodiments, the outer interval P₂is in a range from about 3 μm to about 100 μm. In some embodiments, the inner interval P₁is less than the outer interval P₂, as shown in FIG. 1.

FIG. 4 is an enlarged and perspective view of a portion 500 of FIG. 1, showing the recessed portion 170 of the membrane 150, in accordance with some embodiments. FIG. 5A is a cross-sectional view along the line B-B′ of FIG. 4 to show the recessed portion 170 of the membrane 150, in accordance with some embodiments. FIG. 5B is a cross-sectional view of a membrane 550 without a recessed portion, in accordance with a comparative embodiment. Advantages of the semiconductor device structure including MEMS elements may be described using FIGS. 1, 2J, 4, 5A and 5B.

As shown in FIG. 1, the recessed portions 170 are separated from each other and arranged in an array, in accordance with some embodiments. The array is a circle extending along the edge 390A of the cavity 390. The array may intersect the edge 390A of the cavity 390. Accordingly, the array of the recessed portions 170 forms a ring-shaped corrugation. The membrane 150 with the recessed portions 170 may be similar to a wave-board shown in FIGS. 3A-3F and 4A.

The bending stiffness of the membrane may be increased by increasing the moment of inertia of the membrane. For example, the moment of inertia (I) of the cross-section of the recessed portion 170 of the membrane 150 (FIG. 5A) and the moment of inertia (I) of the cross-section of the membrane 550 may be proportional to the moment of inertia of a rectangular shape section represented as formula (1)

I=b*h³/12 (1)

, wherein b is the length of the portion 500 of the membrane 150, w is the width of the recessed portion 170, D is the depth of the recessed portion 170, and h is the thickness of the cross-sections of the membranes 150 and 550 shown in FIGS. 5A and 5B.

In some embodiments, the moment of inertia (I) of the membrane 150 with the recessed portion 170 can be adjusted by varying the width w and the depth D of the recessed portion 170. Compared with the membrane 550 without the recessed portion (FIG. 5B), the membrane 150 with the recessed portion 170 (FIG. 5A) may have the increased moment of inertia (I) due to the thicker thickness hl of sidewall portions 170-1 and 170-2 of the recessed portion 170 than thickness h of the membrane 150. Therefore, the peripheral region of the membrane 150 has increased moment of inertia and becomes stronger without increasing the thickness of the membrane 150. Stress, which may be concentrated on the peripheral region of the membrane 150 or the membrane 150 near the edge 390A of the cavity 390, is released and greatly reduced. Therefore, the membrane 150 is prevented from cracking or being broken due to stress accumulation.

The length L₁of the recessed portions 170 is adjustable and may be increased to improve the rigidity of the peripheral region of the membrane 150. Also, the depth D₂of the recesses 130, which shape the recessed portions 170, is adjustable and may be increased to enhance the rigidness of the peripheral region of the membrane 150.

In some embodiments, the recessed portions 170 are spaced apart from the center region of the membrane 150. The center region of the membrane 150 remains flexible. The mechanical functionality or sensitivity of the semiconductor device structure remains good. As a result, the membrane 150 has improved rigidity without adversely affecting mechanical functionality or sensitivity.

In some embodiments, the recessed portions 170 are arranged with an equal period. Each of the recessed portions 170 has a central axis (or extending axis) 410. The central axis 410 may be referred to as an extending axis or a symmetrical axis. In some embodiments, the central axis 410 substantially aligns to the center 400 of the membrane 150, as shown in FIG. 1. Accordingly, the recessed portions 170 form a regular and symmetrical radial corrugation. The membrane 150 is prevented from non-uniform deformation, such as warping or bending. As a result, the membrane 150 including the recessed portions 170 has enhanced reliability without distortion.

FIGS. 3A-3F show various top views of a semiconductor device structure, in accordance with some embodiments. The semiconductor substrate 100, the dielectric layer 110 and the membrane 150 of the semiconductor device structure are shown in FIGS. 3A-3F. Other features of the semiconductor device structure are not shown in FIGS. 3A-3F for a better understanding of the structure. It should be noted that the profiles, arrangements and dimensions shown in FIGS. 3A-3F are only examples and are not a limitation to the disclosure. In some embodiments, the materials, formation methods, and/or benefits illustrated in the aforementioned embodiments can also be applied in the embodiments illustrated in FIGS. 3A-3F, and are therefore not repeated.

Many variations and/or modifications can be made to embodiments of the disclosure. For example, the shape of the recessed portions 170 of the membrane 150 may be varied. As shown in FIG. 3A, the inner width W₁is less than the outer width W₂, in accordance with some embodiments. Accordingly, the recessed portions 170 are trapezoidal. The inner interval P₁is less than the outer interval P₂.

As shown in FIG. 3B, the recessed portions 170 have a flat edge with the inner width W₁and a curved edge with the outer width W₂, in accordance with some embodiments. As shown in FIG. 3C, the recessed portions 170 have a curved edge with the inner width W₁and a curved edge with the outer width W₂, in accordance with some embodiments.

As shown in FIGS. 3D and 3E, the outer width W₂is much greater than the inner width W₁, in accordance with some embodiments. The recessed portions 170 are substantially fan-shaped. As a result, the inner interval P₁is greater than the outer interval P₂. The number and dimension of the fan-shaped recessed portions 170 can be varied according to requirements.

In some embodiments, the central axis 410 of the recessed portions 170 substantially aligns to the center 400 of the membrane 150, as shown in FIGS. 1 and 3A-3E. However, embodiments of the disclosure are not limited thereto. As shown in FIG. 3F, the central axis 410 of the recessed portions 170 does not align to the center 400, in accordance with some embodiments. The recessed portions 170 are arranged periodically in a circular or circle-like array. Multiple recessed portions 170 gradually shift and rotate along a clockwise or counter-clockwise direction, as shown in FIG. 3F. The arrangement of the recessed portions 170 is asymmetric.

The recessed portions 170 in FIG. 3F have the same shape as those shown in FIG. 1. However, many variations and/or modifications can be made to embodiments of the disclosure. The recessed portions 170 in FIG. 3F may have the same shape as those shown in FIGS. 3A-3C.

In accordance with some embodiments, the recessed portions 320 of the membrane 290 in FIG. 2J have similar or substantially the same profile and arrangement as the recessed portions 170 shown in FIGS. 3A-3F, and are therefore not repeated. Similarly, the recessed portions 320 prevent the membrane 290 from being broken due to stress accumulation. The edge rigidity of the membrane 290 is improved. Accordingly, the membrane 290 has enhanced reliability. For example, the semiconductor device structure including the membranes 150 and 290 with corrugations performs much better in reliability tests (such as stress tests, air blow tests, drop tests, other applicable test, or a combination thereof).

Many variations and/or modifications can be made to embodiments of the disclosure. FIG. 6 is a top view of a semiconductor device structure, in accordance with some embodiments.