1200 and the scan driving circuit 1100, respectively.

For example, the timing controller 1500 outputs various gate control signals GCS including a gate start pulse, a gate shift clock, a gate output enable signal, and the like to control the scan driving circuit 1100.

Here, the gate start pulse controls a start timing of one or more gate driving integrated circuits constituting the scan driving circuit 1100. The gate shift clock is a clock signal commonly input to the one or more gate driving integrated circuits and controls a shift timing of the scan signal Scan. The gate output enables signal specifies timing information of the one or more gate driving integrated circuits.

In addition, the timing controller 1500 outputs various data control signals DCS including a source start pulse, a source sampling clock, a source output enable signal, and the like to control the data driving circuit 1200.

Here, the source start pulse controls a data sampling start timing of one or more source driving integrated circuits constituting the data driving circuit 1200. The source sampling clock is a clock signal that controls a sampling timing of data in each source driving integrated circuit. The source output enable signal controls an output timing of the data driving circuit 1200.

FIG. 3 is a circuit illustrating a normal emission state in the light emitting display device of the present disclosure, and FIG. 4 is a circuit diagram illustrating a darkened state in the light emitting display device of the present disclosure. FIGS. 5A and 5B are timing diagrams illustrating voltage changes in anodes of a light emitting display device of a first experimental example Ex1 and a light emitting display device of a second experimental example Ex2.

FIG. 5A is a timing diagram of the light emitting display device without having the switch according to the present disclosure in the first experimental example, in which a reference line and the anode have the same vertical separation distance in the overlapping region. That is, in the light emitting display of the first experimental example illustrated in FIG. 5A, an insulating layer provided between the reference line and the anode has the same thickness between the reference line and the anode. FIG. 5B is a timing diagram of the light emitting display device having the switch according to the present disclosure in the second experimental example, which differs from the experimental example of FIG. 5A in that the light emitting display device includes the switch operating due to overcurrent and/or overvoltage illustrated in FIGS. 2 to 4.

An operation of the pixel circuit PC in a normal state will be described with reference to FIGS. 3 and 5.

As illustrated in FIGS. 5A and 5B, in a first period P1 in which normal operation is performed, the light emitting elements are normally turned on/off according to a voltage level applied to the anodes in both the first experimental example shown in FIG. 5A and the second experimental example shown in FIG. 5B. In this case, the ground voltage or a low-level voltage is applied to the reference line RL, and thus the anode can operate by receiving a driving current from the driving transistor DT without being affected by the sensing transistor SE.

In the pixel circuit PC in a normal state, on/off of the switching transistor ST is controlled by the scan signal Scan applied through the scan line SL, and when the switching transistor ST between the fifth node N5 and the third node N3 is turned on, the driving transistor DR connected at the third node N3 is controlled.

That is, when the switching transistor ST is turned on by the scan signal Scan, the data voltage Data supplied through the data line DL is applied to the gate electrode of the driving transistor DR through the third node N3, and the voltage applied to the gate electrode changes from a low level VL to a high level VH. When the voltage applied to the gate electrode is equal to or greater than the threshold voltage of the driving transistor DR, the driving transistor is turned on and the driving current can be supplied to the light emitting element ED from the driving power line VL through the driving transistor DR. In addition, when the driving current is supplied to the light emitting element ED, the light emitting element ED is turned on to emit light normally.

In the first and second experimental examples, sensing through the reference line RL may be performed by supplying a sensing voltage through the reference line RL. At this time, the sensing voltage is less than the high level signal VH supplied to the anode, and the application of the sensing voltage does not affect whether or not the light emitting element emits light. When the sensing voltage is supplied through the reference line, the third electrode N1b of the driving transistor DR is connected to the first electrode N1c of the sensing transistor SE, voltage change in the first node N1 is sensed through the sensing unit 1400 connected to the reference line RL, and thus an abnormality of the driving transistor DR according to aging may be detected.

Sensing of the first node N1 through the reference line RL may be performed according to each application of a sensing signal SENSE. The sensing signal SENSE may be applied simultaneously with a scan signal Scan for each frame or may be applied at predetermined intervals. Alternatively, the sensing signal SENSE may be applied every plurality of frames.

When an electrical foreign material or the like occurs in the driving transistor DR as in a second period P2 of FIGS. 5A and 5B, this may act as a resistor R connected in parallel with the driving transistor DR, and thus a voltage higher than the operating voltage VH of the driving transistor DR, that is, close to the driving power supply voltage EVDD may be applied to the third electrode N1b, which is the output terminal of the driving transistor DR.

As illustrated in FIG. 5A, when the switch, which is the configuration of the present disclosure, is absent in the first experimental example, the high voltage of the third electrode N1b of the driving transistor DR is directly applied to the anode N1a. In this case, a high voltage higher than the high level signal VH is applied to the anode of the light emitting element, and thus the light emitting element may act as a bright spot emitting bright light. In addition, even if sensing is performed through the reference line in the first experimental example, the anode is directly connected to the electrical foreign material, and thus the sub-pixel in which the electrical foreign material has been infiltrated is not controlled by the driving transistor through the anode and is observed as a bright spot.

However, in the light emitting display device of the present disclosure in the second experimental example, even if high overvoltage and/or overcurrent occur at the first node N1c, N1b and N1a of the switch connected to the third electrode N1b of the driving transistor DR due to an electrical foreign material, an insulating layer provided between the anode and the overlapping reference line RL in the same sub-pixel has breakdown characteristics and thus the anode is immediately connected to the reference line in the second period P2 corresponding to an abnormal state, as illustrated in FIGS. 4 and 5B. This indicates a state in which the first node N1c and the second node N2 (N2a, N2b) of the switch SW of FIG. 4 are automatically connected. In this case, even if the anode is in contact with an electrical foreign material, the overvoltage and/or overcurrent of the first node N1c is immediately transferred to the reference line RL connected to the second node N2. Then, if overcurrent is detected when the voltage of the second node N2 is sensed through the reference line, when the ground voltage is immediately supplied through the reference line, the anode N1a in direct contact with the reference line becomes a ground state, and thus the light emitting element ED can be blackened. The reference line RL connected to the sub-pixel in which such darkening occurs continuously supplies the ground voltage after the voltage of the second node N2 is sensed to maintain darkening of the sub-pixel.

Hereinafter, the sub-pixel structure of the light emitting display device according to the present disclosure will be described in detail.

FIG. 6 is a plan view illustrating the switch of the light emitting display device according to the present disclosure, FIG. 7 is a cross-sectional view taken along line I-I′ of FIG. 6, and FIG. 8 is a cross-sectional view illustrating a driving transistor and an anode of the light emitting display device according to an embodiment of the present disclosure.

As illustrated in FIGS. 6 to 8, the light emitting display device of the present disclosure may include a light emitting element ED including an anode 150a (150b, 150c, and 150d), an emission layer 170, and a cathode 200, a reference line RL overlapping the anodes 150a, 150b, 150c, and 150d, and a passivation layer 1600 provided between the anode 150a and the reference line RL and having at least one breakdown part (BD in FIG. 7) in a first region R1 where the anodes 150a, 150b, 150c, and 150d and the reference line RL overlap.

In FIG. 6, a structure in which the anode 150a, which is an overlapping target, and the reference line RL overlap in the formation of the switch SW are specifically illustrated and other components are omitted. As shown in the first sub-pixel SP1, the pixel circuit PC of each sub-pixel may include a sensing transistor SE using the reference line RL as a second electrode and having a first electrode (refer to N1c in FIG. 2) connected to the anode 150a (refer to N1a in FIG. 2), a driving transistor DR having a third electrode (refer to N1b in FIG. 2) connected to the anode 150a and a fourth electrode connected to a driving voltage line (refer to VDL in FIG. 2), and a switching transistor ST having a fifth electrode connected to a data line and a sixth electrode a gate electrode of the driving transistor.

As illustrated in FIG. 6, the reference line RL may extend in a vertical direction to be connected to the sensing unit (1400 in FIG. 1) and may integrally include reference line horizontal portions RL_H1 and RL_H2 overlapping the anodes 150a, 150b, 150c, and 150d to be shared by adjacent sub-pixels SP1, SP2, SP3, and SP4. The reference line horizontal portions RL_H1 and RL_H2 may have a shape in the X-axis direction and may also have bent portions along inclined portions of the anodes 150b and 150c. In some cases, a part of the reference line horizontal portions RL_H1 and RL_H2 may be used as the gate electrode of the sensing transistor SE in each sub-pixel SP.

The light emitting display device may have different areas according to colors represented by the sub-pixels SP1, SP2, SP3, and SP4, which may be adjusted by the area of the anode 150a.

The first to fourth sub-pixels SP1, SP2, SP3, and SP4 illustrated in FIG. 6 may be, for example, red, green, blue, and white sub-pixels. However, the present disclosure is not limited thereto, and sub-pixels emitting light of the same color may be disposed adjacent to each other.

In the light emitting display device of the present disclosure, the sub-pixels SP1, SP2, SP3, and SP4 may include the anodes 150a, 150b, 150c, and 150d, the reference line RL or the reference line horizontal portions RL_H1 and RL_H2, and at least one switch SW, and abnormal operation of the light emitting element ED of each of the sub-pixels SP1, SP2, SP3, and SP4 is prevented or at least reduced due to overcurrent, which in turn prevents or at least reduces an abnormal bright spot from being visually recognized.

Meanwhile, the region of the light emitting element ED in which the anode 150a, the functional layer 170, and the cathode 200 overlap in each sub-pixel may serve as a light emitting part EM. Although FIG. 5 separately illustrates the areas of the pixel circuit PC and the light emitting part EM, the present disclosure is not limited thereto. In some cases, the light emitting part EM may also be provided in an area overlapping the thin film transistors ST, DR, and SE and the lines SL, DL, SEL, VDL, and RL.

As illustrated in FIG. 7, the passivation layer 1600 may include a first insulating layer 120 having a first thickness a having breakdown characteristics against an overvoltage in the first region R1 and a second thickness h greater than the first thickness in a second region R2 around the first region R1, and a second insulating layer 130 with a planarized surface provided on the first insulating layer 120.

As illustrated in FIG. 8, the first insulating layer 120 may be a passivation layer that primarily covers thin film transistors such as the driving transistor DR, and may be a kind of inorganic insulating layer. For example, the first insulating layer 120 may include at least one of silicon dioxide (SiO2), hafnium oxide (HfO2), aluminum oxide (Al2O3), and trisilicon tetranitride (Si3N4). It is desirable that the first insulating layer 120 be an inorganic insulating layer that is advantageous in thin patterning. The first insulating layer 120 may be any one of a nitride layer, an oxide layer, or an oxynitride layer.

Breakdown of an insulating layer is a phenomenon in which, when the insulating layer is disposed between two electrodes and a strong electric field is applied across the electrodes, the insulation properties of the insulating layer are lost and ohmic contact instantaneously occurs between the two electrodes.

For example, the SiO2 film has breakdown characteristics of 2.7 Vnm−1, and when it is formed to a thickness of 10 nm and a high voltage of 27 V or more acts as an electric field across upper and lower electrodes having the SiO2 layer interposed therebetween, the SiO2 layer breaks down and loses the insulation properties thereof, and thus the upper and lower electrodes can be electrically connected. The HfO2 layer has breakdown characteristics (2.7 Vnm−1 or less) similar to or lower than that of the SiO2 layer and exhibits sensitive breakdown characteristics at a lower voltage at the same thickness as the SiO2 layer. The Al2O3 layer and the Si3N4 layer exhibit breakdown characteristics (exceeding 2.7 Vnm−1) higher than that of the SiO2 layer, and thus they break down at a higher voltage at the same thickness as the SiO2 layer or at a higher voltage similar to a voltage at which the SiO2 layer breaks down when the thickness is less than that of the SiO2 layer. The present disclosure is not limited to the presented insulating layer, and any insulating layer can be used as long as it can be formed thin in the first region R1 defined as the switch and has the breakdown characteristics.

As shown in FIG. 7, in the light emitting display device of the present disclosure, the first node N1 of the switch SW is used as the anode 150a in the first region R1, the second node N2 is used as the reference line RL or the reference line horizontal portion RL_H1, and the thin first insulating layer 120 is provided between the overlapping anode 150a and reference line RL or reference line horizontal portion RL_H1 in the first region R1. The thickness of the first insulating layer 120 in the first region R1 may depend on the breakdown characteristics of the component of the first insulating layer and a high voltage to be sensed. For example, when the first insulating layer 120 is a SiO2 layer or a HfO2 layer, the thickness of the first region R1 may be 20 nm or less. When the first insulating layer 120 is an Al2O3 layer or a Si3N4 layer, the thickness of the first region R1 may be 100 nm or less.

In some cases, a thin first layer having breakdown characteristics against high voltages is formed in both the first region R1 and the second region R2, and an inorganic insulating layer is additionally formed as a second layer only in the second region R2 except the first region R1 to adjust the thickness of the second region R2 to h which can maintain interlayer insulation. In this case, the thickness h−a of the inorganic insulating layer of the second layer selectively formed in the second region R2 may be greater than the thickness of the first layer.

The second insulating layer 130 on the first insulating layer 120 is formed on parts other than parts directly connected to the anode 150a?, such as the third electrode N1b of the driving transistor DR, and the switch SW, and has the interlayer insulation characteristic in regions other than the connected parts (refer to DTC in FIG. 8) and the switch SW.

The second insulating layer 130 may have a tip HT contacting the top surface of the first insulating layer 120 such that a partial region within the first region R1 becomes the breakdown part BD to efficiently discharge electrons of overcurrent from the anode 150a to the reference line horizontal region RL_H1. The tip HT in the second insulating layer 130 may have a shape of a polygonal pyramid or a cone in which the lower width CTP thereof that contacts the first insulating layer 120 is narrower than the open area of the upper surface of the second insulating layer 130 when viewed in a cross section. The tip HT may have a conical shape of a polygonal pyramid shape when viewed in a three-dimension, may have a conical shape when the lower width CTP that contacts the upper surface of the first insulating layer 120 is a point, or may have a truncated conical shape or a polygonal truncated conical shape when having a predetermined width or area.

When the breakdown part BD is provided locally in the first region R1, overcurrent in the anode 150a of the first node N1 can automatically escape to the reference line through the second node N2 by a switch-on operation according to the breakdown characteristics of the first insulating layer 120 due to the overcurrent.

Meanwhile, the first insulating layer 120 and the second insulating layer 130 serve to protect the driving transistor DR, the sensing transistor SE, and the switching transistor SR, and are commonly referred to as the passivation layer 1600.

The first insulating layer 120 is an inorganic insulating layer, and the second insulating layer 130 is an organic insulating layer. The second insulating layer 130 may be thicker than the first insulating layer 120 and have excellent surface planarization. The first insulating layer 120 is also called a passivation layer, and the second insulating layer 130 is also called an overcoat layer. The second insulating layer 130 may be an organic insulating layer with low dielectric constant formed of polyacrylic, benzocyclobutene (BCB), or polyamide.

In some cases, a bank (180 in FIG. 8) may be further provided between the anode 150a and the passivation layer 1600 in the first region R1. When the bank 180 is provided in the first region R1, the first region R1 may be located outside the light emitting part.

The tip HT of the second insulating layer 130 is defined as a shape in which the second insulating layer 130 is removed.

The lower surface of the tip HT of the second insulating layer 130 may have a narrower width than the upper surface thereof.

The anode 150a is provided within the tip HT of the second insulating layer 130, and may be in contact with the upper surface of the first insulating layer 120 having the first thickness a.

As illustrated in FIG. 8, the light emitting display device of the present disclosure further includes the driving transistor DR connected to the anode 150a, and the second region R2 of the first insulating layer 120 may protect the driving transistor DR. At the first node N1, the third electrode N1b of the driving transistor DR and the first electrode N1c of the sensing transistor SE may be integrally formed as an electrode pattern 123, and the sensing transistor SE can also be protected by the first insulating layer 120. The switching transistor ST and the storage capacitor Cst formed in the same process as that for forming the driving transistor DR and the sensing transistor SE may also be protected by the first insulating layer 120.

It is desirable that the first insulating layer 120 having first thickness a have the breakdown characteristics at a higher voltage than the operating voltage VH of the driving transistor in the first region R1 where the switch SW is defined.

A cross-sectional structure of the driving transistor DR according to an embodiment of the present disclosure will be described with reference to FIG. 8.

The driving transistor DR is provided on a predetermined portion of the substrate 100.

The substrate 100 may be at least one of a glass substrate, a plastic substrate, or a metal substrate. When transparency of the light emitting display device is considered, the substrate 100 may be a transparent substrate. In some cases, a substrate in which an inorganic insulating layer is interposed between organic transparent substrates may be used for the purposes of both flexibility and prevention or reduction of inflow of impurities from the substrate 100 to internal elements.

The driving transistor DR includes a first semiconductor layer 115a, a gate electrode 121 overlapping a channel region of the first semiconductor layer 115a having a gate insulating layer 125 interposed therebetween, and a third electrode N1b and a fourth electrode 122 spaced apart from the gate electrode 121 and connected to both sides of the first semiconductor layer 115a on a predetermined portion of the substrate 100. The third electrode N1b may be integrally formed by the same electrode pattern 123 as the first electrode N1c of the sensing transistor SE. The first electrode N1c and the third electrode N1b are integrally formed or electrically connected to have the same voltage level as the first node N1, which may be the first node N1 corresponding to one side of the switch.

The first electrode N1c of the sensing transistor SE may be connected to one side of a second semiconductor layer 115b.

A light blocking layer 105 may be provided at least below the channel of the first and second semiconductor layers 115a and 115b to prevent or at least reduce the first and second semiconductor layers 115a and 115b from being affected by light leakage in the substrate 100. In some cases, the light blocking layer 105 may be omitted.

A buffer layer 110 may be provided between the light blocking layer 105 and the first and second semiconductor layers 115a and 115b. The buffer layer 110 may prevent or at least reduce infiltration of impurities into the first and second semiconductor layers 115a and 115b through the substrate 100.

In some cases, a buffer layer may be additionally provided between the substrate 100 and the light blocking layer 105.

The first insulating layer 120 is provided with a thickness difference between the first region R1 and the second region R2. The first insulating layer 120 has the first thickness a in the first region R1 where the switch SW is defined, as illustrated in FIG. 7, and has the second thickness greater than the first thickness a in the second region R2 including a thin film transistor such as the driving transistor DR, as illustrated in FIG. 8. The third electrode N1b of the driving transistor DR and the first electrode N1c of the sensing transistor SE are electrically connected to the anode 150a as the integrated electrode pattern 123 through a pixel connection part DTC provided in the passivation layer 1600.

The pixel connection part DTC of the passivation layer 1600 and the tip HT of the second insulating layer 130 may be formed with different mask opening shapes through the same process.

As illustrated in FIG. 8, the bank 180 may overlap an edge of the anode 150a while the anode 150a exposes the light emitting part. The bank 180 may overlap the pixel circuit (PC in FIG. 2) such as the driving transistor DR.

The light emitting element ED includes the anode 150a, the functional layer 170, and the cathode 200 which are formed in an overlapping manner. As illustrated in FIGS. 6 and 8, the anodes 150a, 150b, 150c, and 150d are separated for respective sub-pixels SP1, SP2, SP3, and SP4, and the bank 180 may be provided on the edges of the anodes 150a, 150b, 150c, and 150d and between the anodes 150a, 150b, 150c, and 150d. In some cases, the bank 180 may be omitted.

The functional layer 170 may include one or more stacks having hole related layers with respect to hole transport and injection below the emission layer and electron related layers with respect to electron transport and injection on the emission layer. When the functional layer 170 includes a plurality of stacks, a charge generation layer may be included between the stacks. The charge generating layer may include a heterojunction layer of an n-type charge generating layer and a p-type charge generating layer. When a plurality of stacks is provided in the functional layer 170, different emission layers may be provided between the stacks. When three or more stacks are provided in the functional layer 170, at least two of the stacks may include emission layers emitting the same color. Different emission layers may be disposed adjacent to each other in the stack provided in the functional layer 170.

In some cases, when the functional layer 170 includes a single stack or a plurality of stacks, the functional layer 170 may have emission layers separated for each sub-pixel SP such that respective sub-pixels have emission layers emitting different colors.

The light emitting display device of the present disclosure includes an insulating layer having breakdown characteristics against overvoltage between a first node connected to an anode and a second node connected to a reference line through a switch connected to the first node and the second node, to prevent or at least reduce the overvoltage causing a bright spot from being directly transferring to the anode according to automatic switching when the overvoltage is applied. Accordingly, in a sub-pixel in which overcurrent/overvoltage has occurred, a direct overcurrent path to the anode is blocked and the overcurrent escapes to the reference line. Therefore, the sub-pixel in which an overvoltage/overcurrent has occurred is darkened and abnormal visual recognition by viewers can be prevented or at least reduced.

FIGS. 9 to 11 are diagrams illustrating various embodiments of the switch of the light emitting display device according to the present disclosure.

As illustrated in FIG. 9, the switch SW of the light emitting display device according to an embodiment of the present disclosure may have tips HT