19 is provided between the sixth semiconductor region 16 and the second conductive portion 52b. A ninth carrier concentration of the second conductive type in the ninth semiconductor region 19 is higher than a sixth carrier concentration of the second conductive type in the sixth semiconductor region 16. The sixth semiconductor region 16 is, for example, a p-layer. The ninth semiconductor region 19 is a p layer or a p+-layer. The ninth semiconductor region 19 corresponds to a p-contact layer, for example.

As shown in FIG. 1, a distance between the first face 51f and the second conductive portion 52b along the first direction D1 is defined as a third distance d3. A distance between the first face 51f and the seventh semiconductor region 17 along the first direction D1 is defined as a fourth distance d4. The third distance d3 is shorter than the fourth distance d4.

In the second element 10B, the amount of holes injected into the semiconductor member 10M can be reduced. The loss can be reduced.

In the first element 10A of the semiconductor device 110, the first conductive portion 52a may make a Schottky contact with the fifth semiconductor region 15 (for example, the n-contact layer). For example, a high breakdown voltage is easily obtained.

As described above, the second conductive portion 52b is included in the second element 10B (IGBT). On the other hand, the first conductive portion 52a is included in the first element 10A (FWD). The second conductive portion 52b may include a material different from the material included in the first conductive portion 52a.

For example, the first conductive portion 52a may include a material that is easy to make a Schottky contact with the n-type semiconductor (for example, n-type silicon). In one example, the first conductive portion 52a includes at least one selected from the group consisting of Pt, V, Ti, TiN, Al, W, and Ni. In one example, the first conductive portion 52a may include at least one selected from the group consisting of Pt, V, Ti, TiN, and Ni. On the other hand, the second conductive portion 52b may include a material that is easy to make an ohmic contact with the p-type semiconductor (for example, p-type silicon). In one example, the second conductive portion 52b may include, for example, at least one selected from the group consisting of Al, W, and Ta. For example, the second conductive portion 52b may include, for example, a silicide of at least one selected from the group consisting of Al, W, and Ta. For example, the contact resistance between the first conductive portion 52a and the fifth semiconductor region 15 may be higher than the contact resistance between the second conductive portion 52b and the ninth semiconductor region 19.

As shown in FIG. 1, the insulating member 40 may include a third insulating region 43. The third insulating region 43 is provided between the first conductive member 61 and the second electrode 52. The third insulating region 43 is provided between the third electrode 53 and the second electrode 52. For example, the third insulating region 43 is provided between the first conductive member 61 and the first conductive region 52p. The third insulating region 43 is provided between the third electrode 53 and the second conductive region 52q.

For example, the first conductive member 61 extends along a third direction D3. The third direction D3 crosses a plane including the first direction D1 and the second direction D2. The third direction D3 is, for example, the Y-axis direction. A plurality of first conductive members 61 may be provided. A direction from one of the plurality of first conductive members 61 to another one of the plurality of first conductive members 61 is, for example, along the second direction D2.

For example, the third electrode 53 extends along the third direction D3. A plurality of third electrodes 53 may be provided. A direction from one of the plurality of third electrodes 53 to another one of the plurality of third electrodes 53 is along the second direction D2, for example.

A plurality of the first conductive portions 52a may be provided corresponding to the plurality of the first conductive members 61. A plurality of the second conductive portions 52b may be provided corresponding to the plurality of the third electrodes 53.

FIG. 2 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment.

FIG. 2 is a cross-sectional view corresponding to the line A1-A2 of FIG. 1. In FIG. 2, some elements such as the first electrode 51 are omitted.

As shown in FIG. 2, the semiconductor member 10M includes a cell portion 10C and a terminal portion 10P. The terminal portion 10P is outside the cell portion 10C. A cell end portion 10D may be provided between the cell portion 10C and the terminal portion 10P. The cell portion 10C and the cell end portion 10D are, for example, an active area. The cell portion 10C may be a central portion of the active area, for example.

In the semiconductor device 110 illustrated in FIG. 2, the fifth semiconductor region 15 is strip-shaped. The fifth semiconductor region 15 extends along the third direction D3.

As described below, the pattern shape of the fifth semiconductor region 15 may be changed in various ways.

Second Embodiment

FIG. 3 is a schematic cross-sectional view illustrating a semiconductor device according to a second embodiment.

FIG. 3 is a cross-sectional view corresponding to the line A1-A2 of FIG. 1. In FIG. 3, some elements such as the first electrode 51 are omitted.

As shown in FIG. 3, in a semiconductor device 120 according to the embodiment, a plurality of the fifth semiconductor regions 15 are provided. Except for this, the configuration of the semiconductor device 120 may be the same as the configuration of the semiconductor device 110.

As shown in FIG. 3, a direction from one of the plurality of the fifth semiconductor regions 15 to another one of the plurality of the fifth semiconductor regions 15 is along the third direction D3. The third direction D3 is, for example, the Y-axis direction.

For example, as shown in FIG. 3, the second semiconductor region 12 includes the first semiconductor portion 12a and the second semiconductor portion 12b. The direction from the first semiconductor portion 12a to the second semiconductor portion 12b is along the third direction D3. The fifth semiconductor region 15 is located between the first semiconductor portion 12a and the first conductive portion 52a in the first direction D1. The second semiconductor portion 12b is in contact with the first conductive portion 52a.

As shown in FIG. 3, a plurality of second semiconductor portions 12b may be provided. A direction from one of the plurality of second semiconductor portions 12b to another one of the plurality of second semiconductor portions 12b is along the third direction D3. A plurality of first semiconductor portions 12a may be provided. The direction from one of the plurality of first semiconductor portions 12a to another one of the plurality of first semiconductor portions 12a is along the third direction D3. One of the plurality of first semiconductor portions 12a is provided between one of the plurality of second semiconductor portions 12b and another one of the plurality of second semiconductor portions 12b.

In the semiconductor device 120, a region where the fifth semiconductor region 15 is provided and a region where the fifth semiconductor region 15 is not provided are provided. For example, the hole injection amount can be adjusted according to the area of the fifth semiconductor region 15 (For example, the n-contact layer). The loss (for example, recovery loss) can be suppressed while obtaining more proper operation.

FIG. 4 is a schematic cross-sectional view illustrating a semiconductor device according to the second embodiment.

FIG. 4 is a cross-sectional view corresponding to the line A1-A2 of FIG. 1. In FIG. 4, some elements such as the first electrode 51 are omitted.

As shown in FIG. 4, also in a semiconductor device 121 according to the embodiment, a plurality of the fifth semiconductor regions 15 are provided. In the semiconductor device 121, the distribution of the plurality of the fifth semiconductor regions 15 is not uniform. Except for this, the configuration of the semiconductor device 121 may be the same as the configuration of the semiconductor device 120.

As shown in FIG. 4, in the semiconductor device 121, in the cell portion 10C, the fifth semiconductor region 15 is continuous strip-shaped. In the cell end portion 10D, a plurality of mutually independent the fifth semiconductor regions 15 are provided.

Thus, the semiconductor member 10M may include the cell portion 10C, the terminal portion 10P outside the cell portion 10C, and the cell end portion 10D between the cell portion 10C and the terminal portion 10P. The first semiconductor portion 12a provided with the fifth semiconductor region 15 is provided in the cell portion 10C. The second semiconductor portion 12b without the fifth semiconductor region 15 is provided in the cell end portion 10D.

For example, in at least a part of the cell end portion 10D, the fifth semiconductor region 15 is not provided and the second semiconductor portion 12b is provided. For example, holes are effectively ejected in the recovery operation at the cell end portion 10D. For example, the loss in the recovery can be effectively suppressed near the terminal region (cell end portion 10D) in the FWD region.

As the example shown in FIG. 4, an intermediate portion 10E may be provided between the cell portion 10C and the cell end portion 10D. A plurality of the fifth semiconductor regions may be provided in the intermediate portion 10E. In the intermediate portion 10E, the first semiconductor portion 12a and the second semiconductor portion 12b may be provided.

In the semiconductor device 121, for example, an area ratio of the fifth semiconductor region 15 to a unit area in the cell end portion 10D is lower than an area ratio of the fifth semiconductor region 15 to a unit area in the cell portion 10C.

FIG. 5 is a schematic cross-sectional view illustrating a semiconductor device according to the second embodiment.

FIG. 5 is a cross-sectional view corresponding to the line A1-A2 of FIG. 1. In FIG. 5, some elements such as the first electrode 51 are omitted.

As shown in FIG. 5, also in a semiconductor device 122 according to the embodiment, a plurality of the fifth semiconductor regions 15 are provided. In the semiconductor device 122, the distribution of the plurality of the fifth semiconductor regions 15 is not uniform. Except for this, the configuration of the semiconductor device 122 may be the same as the configuration of the semiconductor device 120.

As shown in FIG. 5, in the semiconductor device 122, the semiconductor member 10M includes the cell portion 10C, the terminal portion 10P, and the cell end portion 10D. In the semiconductor device 122, the first semiconductor portion 12a provided with the fifth semiconductor region 15 is provided in the cell end portion 10D. In the cell end portion 10D, the fifth semiconductor region 15 is strip-shaped. The second semiconductor portion 12a in which without the fifth semiconductor region 15 is provided in the cell portion 10C.

In a semiconductor device 122, the hole injection is suppressed in the cell end portion 10D. The recovery loss can be effectively suppressed in the cell end portion 10D.

In the semiconductor device 122, in the cell portion 10C, a plurality of the fifth semiconductor regions 15 may be provided. In the cell portion 10C, a plurality of first semiconductor portions 12a and a plurality of second semiconductor portions 12b may be provided. For example, the direction from one of the plurality of second semiconductor portions 12b to another one of the plurality of second semiconductor portions 12b is along the third direction D3.

In the semiconductor device 122, for example, the area ratio of the fifth semiconductor region 15 to a unit area in the cell end portion 10D is higher than the area ratio of the fifth semiconductor region 15 to a unit area in the cell portion 10C.

The distribution of the fifth semiconductor region 15 described with respect to the semiconductor device 120, the semiconductor device 121, and the semiconductor device 122 may be applied to each of the plurality of first conductive portions 52a.

Third Embodiment

FIG. 6 is a schematic cross-sectional view illustrating a semiconductor device according to a third embodiment.

FIGS. 7A and 7B are schematic cross-sectional views illustrating the semiconductor device according to the third embodiment.

FIG. 7A is a cross-sectional view corresponding to the line B1-B2 of FIG. 6. FIG. 7B is a cross-sectional view corresponding to the line C1-C2 of FIG. 6.

As shown in FIG. 6, in a semiconductor device 130 according to the embodiment, a plurality of first conductive portions 52a are provided. The plurality of first conductive portions 52a extend, for example, along the third direction D3. The direction from one of the plurality of first conductive portions 52a to another one of the plurality of first conductive portions 52a is along the second direction D2.

As shown in FIG. 6, the semiconductor member 10M includes a first cell portion 10CA and a second cell portion 10CB. The second cell portion 10CB is outside the first cell portion 10CA. The first cell portion 10CA may correspond to the cell center portion. The second cell portion 10CB may correspond to a cell end side portion. The direction from the first cell portion 10CA to the second cell portion 10CB is along the second direction D2.

As shown in FIG. 6, one of the plurality of first conductive portions 52a is provided in the first cell portion 10CA. Another one of the plurality of first conductive portions 52a is provided in the second cell portion 10CB.

FIG. 7A illustrates a cross section of a portion corresponding to one of the plurality of first conductive portions 52a. FIG. 7B illustrates a cross section of a portion corresponding to another one of the plurality of first conductive portions 52a. In FIGS. 7A and 7B, some elements such as the first electrode 51 are omitted.

As shown in FIG. 7A, the semiconductor member 10M includes the fifth semiconductor region 15 of the first conductive type. The fifth semiconductor region 15 is located between the second semiconductor region 12 and one of the plurality of first conductive portions 52a in the first direction D1. In the example of FIG. 7A, the fifth semiconductor region 15 is strip-shaped.

As shown in FIG. 7B, at least a part of the other one of the plurality of first conductive portions 52a contacts the second semiconductor region 12. In this example, a plurality of the fifth semiconductor regions 15 are provided in the other one of the plurality of first conductive portions 52a. For example, a plurality of first semiconductor portions 12a and a plurality of second semiconductor portions 12b are provided. One of the plurality of the fifth semiconductor regions 15 is located between one of the plurality of first semiconductor portions 12a and the other one of the plurality of first conductive portions 52a. The plurality of second semiconductor portions 12b are in contact with the other one of the plurality of first conductive portions 52a.

In the semiconductor device 130, for example, the area ratio of the fifth semiconductor region 15 to a unit area in the cell end portion 10D is lower than the area ratio of the fifth semiconductor region 15 to a unit area in the cell portion 10C.

For example, on the cell end portion 10D, holes are effectively ejected in the recovery operation. Loss can be suppressed.

An example of simulation results of characteristics of the semiconductor device will be described below.

FIG. 8 is a graph illustrating characteristics of semiconductor devices.

FIG. 8 illustrates the characteristics of the first element 10A. The horizontal axis of FIG. 8 is the forward voltage Vf. The vertical axis is the normalized recovery loss Err1. FIG. 8 illustrates the characteristics of a first configuration CF1, a second configuration CF2, a third configuration CF3, and a fourth configuration CF4.

The first configuration CF1 corresponds to the semiconductor device 110 illustrated in FIG. 1. In the first configuration CF1, the second configuration CF2, and the third configuration CF3, the fifth semiconductor region 15 is provided. In the first configuration CF1, the fifth semiconductor region 15 is in contact with the first conductive portion 52a. In the second configuration CF2 and the third configuration CF3, the fifth semiconductor region 15 is separated from the first conductive portion 52a. In the second configuration CF2, the distance in the Z-axis direction between the fifth semiconductor region 15 and the first conductive portion 52a is 0.2 μm. In the third configuration CF3, the distance in the Z-axis direction between the fifth semiconductor region 15 and the first conductive portion 52a is 0.5 μm. In the fourth configuration CF4, the fifth semiconductor region 15 is not provided.

As shown in FIG. 8, in the first configuration CF1, the recovery loss Err1 lower than that of the fourth configuration CF4 without the fifth semiconductor region 15 is obtained. According to the embodiments, the recovery loss (normalized recovery loss Err1) can be reduced.

In the second configuration CF2 and the third configuration CF3, the recovery loss Err1 lower than that of the fourth configuration CF4 without the fifth semiconductor region 15 is also obtained. When the fifth semiconductor region 15 is separated from the first conductive portion 52a, the recovery loss Err1 tends to increase. The fifth semiconductor region 15 is preferably in contact with the first conductive portion 52a.

In the embodiment, at least one of the first electrode 51 and the second electrode 52 includes at least one selected from the group consisting of, for example, Al, Ti, Ni, W and Au. The third electrode 53 may include, for example, polysilicon. The insulating member 40 may include, for example, silicon and oxygen. The insulating member 40 may include, for example, silicon oxide.

In the embodiments, information about length and thickness can be obtained by electron microscopy and the like. In the embodiments, the impurity concentration may be a carrier concentration. In the embodiments, the impurity concentration may be the concentration corresponding to the doping amount of the impurity. Information on the distribution and value of the impurity concentration in the semiconductor regions is obtained, for example, by secondary ion mass spectrometry (SIMS). The relative relationship between the impurity concentrations in the two semiconductor regions may be determined using, for example, a scanning capacitance microscopy (SCM). Information on the distribution and values of impurity concentrations may be obtained, for example, by spreading resistance analysis (SRA). The SCM and the SRA provide, for example, information on the relative relationship and the value of the carrier concentration in the semiconductor regions. For example, by assuming the activation rate of the impurity, the measurement results of SCM and SRA may provide information on at least one of the relative relationship between the impurity concentrations of the two semiconductor regions, the distribution of the impurity concentrations, or the value of the impurity concentrations.

Configuration 1

A semiconductor device, comprising:

- a first electrode including a first face;
- a second electrode including a first conductive region and a first conductive portion, the first conductive portion being electrically connected to the first conductive region;
- a first conductive member provided between the first face and the first conductive region;
- a semiconductor member provided between the first face and the second electrode, the semiconductor member including
  - a first semiconductor region of a first conductive type, the first semiconductor region including a first partial region, a second partial region, and a third partial region, the first partial region being located between the first face and the first conductive member in a first direction perpendicular to the first face, a second direction from the first partial region to the second partial region crossing the first direction, the second partial region being located between the first face and the third partial region in the first direction, a direction from the first conductive member to the third partial region being along the second direction,
  - a second semiconductor region of a second conductive type, a part of the second semiconductor region being provided between a part of the first conductive member and the first conductive portion,
  - a third semiconductor region of the second conductive type, the second semiconductor region being located between the third partial region and the third semiconductor region in the first direction, a direction from another part of the first conductive member to the third semiconductor region being along the second direction, a third carrier concentration of the second conductive type in the third semiconductor region being higher than a second carrier concentration of the second conductive type in the second semiconductor region,
  - a fourth semiconductor region of the first conductive type, the fourth semiconductor region being located between the first face and the first partial region, and between the first face and the second partial region, and
  - a fifth semiconductor region of the first conductive type, the fifth semiconductor region being located between at least a part of the second semiconductor region and at least a part of the first conductive portion in the first direction; and
- an insulating member including a first insulating region, the first insulating region being provided between the semiconductor member and the first conductive member.
  
  Configuration 2

The device according to Configuration 1, wherein a first distance between the first face and the first conductive portion along the first direction is shorter than a second distance between the first face and the third semiconductor region along the first direction.

Configuration 3

The device according to Configuration 1 or 2, wherein the fifth semiconductor region contacts the at least the part of the second semiconductor region.

Configuration 4

The device according to Configuration 1 or 2, wherein

- the second semiconductor region includes a first semiconductor portion and a second semiconductor portion,
- a third direction from the first semiconductor portion to the second semiconductor portion crosses a plane including the first direction and the second direction,
- the fifth semiconductor region is located between the first semiconductor portion and the first conductive portion in the first direction, and
- the second semiconductor portion contacts the first conductive portion.
  
  Configuration 5

The device according to Configuration 4, wherein

- the semiconductor member includes a cell portion, a terminal portion outside the cell portion, and a cell end portion between the cell portion and the terminal portion,
- the first semiconductor portion is provided in the cell portion, and
- the second semiconductor portion is provided in the cell end portion.
  
  Configuration 6

The device according to Configuration 5, wherein

- a plurality of the second semiconductor portions are provided, and
- a direction from one of the plurality of second semiconductor portions to another one of the plurality of second semiconductor portions is along the third direction.
  
  Configuration 7

The device according to Configuration 4, wherein

- the semiconductor member includes a cell portion, a terminal portion outside the cell portion, and a cell end portion between the cell portion and the terminal portion,
- the first semiconductor portion is provided in the cell end portion, and
- the second semiconductor portion is provided in the cell portion.
  
  Configuration 8