35 and the fourth terminal portion 36 is the same as the thickness of the second wiring 34 in the present embodiment, and is, for example, 4 μm or more, preferably 6 μm or more, and for example, 60 μm or less, preferably 40 μm or less. Each dimension of the third terminal portion 35 and the fourth terminal portion 36 in the extending direction (the second direction D2 in FIGS. 1 and 2) of the second wiring 34 is, for example, 10 μm or more, preferably 15 μm or more, and for example, 1500 μm or less, preferably 1000 μm or less. Each dimension of the third terminal portion 35 and the fourth terminal portion 36 in the width direction (the first direction D1 in FIGS. 1 and 2) of the second wiring 34 is preferably greater than the width of the second wiring 34, and is, for example, 10 μm or more, preferably 15 μm or more, and for example, 1000 μm or less, preferably 750 μm or less.

In the wiring pattern 30, the separation distance (separation distance in the first direction D1 in FIGS. 1 and 2) between the first wiring 31 and the second wiring 34 adjacent to each other is, for example, 3 μm or more, preferably 5 μm or more, and for example, 500 μm or less, preferably 250 μm or less.

The cover insulating layer 22 is disposed on one surface in the thickness direction of the base insulating layer 21 so as to cover the first wiring 31 and the second wiring 34 for each product region R1, and has a predetermined pattern shape (illustratively illustrating a case where the cover insulating layer 22 is rectangular for each product region R1, and further, in FIGS. 1 and 2, a portion covered with the cover insulating layer 22 in the first wiring 31 and the second wiring 34 is shown by a broken line). The cover insulating layer 22 does not cover the first terminal portion 32, the second terminal portion 33, the third terminal portion 35, and the fourth terminal portion 36, and these terminal portions are exposed.

A height of the cover insulating layer 22 from the base insulating layer 21 (distance from the base insulating layer 21 to the upper end in FIG. 3 of the cover insulating layer 22) is, for example, 5 μm or more, preferably 7 μm or more, and for example, 70 μm or less, preferably 50 μm or less as long as it is greater than the thickness of the first wiring 31 and the second wiring 34.

The dummy wiring pattern 40 is located on one side in the thickness direction of the substrate 10 and on the base insulating layer 21 in the frame region R2, and includes the first dummy wiring 41 and the second dummy wiring 42. In the present embodiment, the dummy wiring pattern 40 is located on the extending portion 11 of the frame region R2. Specifically, each of the first dummy wiring 41 and the second dummy wiring 42 extends along the product region R1 in the second direction D2 on the extending portion 11. Further, the first dummy wiring 41 and the second dummy wiring 42 are separated and located alternately in the first direction D1, and disposed in parallel (illustratively illustrating an embodiment in which the three first dummy wirings 41 and the two second dummy wirings 42 are located alternately in parallel).

The first dummy wiring 41 is a conductive layer formed in parallel with the first wiring 31 as described later, and is associated with the first wiring 31. The first dummy wiring 41 is preferably electrically connected to the substrate 10 made of metal through a via (not shown) as an electrically conductive connecting portion penetrating the base insulating layer 21. Such a configuration is, in the production process of the assembly sheet X, suitable for forming a protective plating film such as a Ni plating film on the surface of the first dummy wiring 41 (surface not in contact with the base insulating layer 21) by an electrolytic plating method or an electroless plating method.

Further, the first wiring 31 and the first dummy wiring 41 are preferably electrically connected. It is possible to electrically connect the first wiring 31 to the first dummy wiring 41 through the substrate 10 made of metal. Specifically, a first electrically conductive connecting portion (not shown) which electrically connects the first wiring 31 to the substrate 10 is provided, and a second electrically conductive connecting portion (not shown) which electrically connects the first dummy wiring 41 to the substrate 10 is provided, so that it is possible to electrically connect the first dummy wiring 41 to the first wiring 31 through the substrate 10 made of metal (first electrically conductive connecting portion is cut in the production process of the wiring circuit board).

The design thickness of the first dummy wiring 41 is the same as the design thickness of the first wiring 31. The thickness of the first dummy wiring 41 is, for example, 3 μm or more, preferably 5 μm or more, and for example, 50 μm or less, preferably 30 μm or less. The width of the first dummy wiring 41 (dimension in a direction perpendicular to the extending direction of the first dummy wiring 41) is preferably the same as the width of the first wiring 31. The width of the first dummy wiring 41 is, for example, 5 μm or more, preferably 8 μm or more, and for example, 100 μm or less, preferably 50 μm or less.

The second dummy wiring 42 is a conductive layer formed in parallel with the second wiring 34 as described later, and is associated with the second wiring 34. The second dummy wiring 42 is preferably electrically connected to the substrate 10 made of metal through a via (not shown) as an electrically conductive connecting portion penetrating the base insulating layer 21. Such a configuration is, in the production process of the assembly sheet X, suitable for forming a protective plating film such as a Ni plating film on the surface of the second dummy wiring 42 (surface not in contact with the base insulating layer 21) by an electrolytic plating method or an electroless plating method.

Further, the second wiring 34 and the second dummy wiring 42 are preferably electrically connected. It is possible to electrically connect the second wiring 34 to the second dummy wiring 42 through the substrate 10 made of metal. Specifically, a third electrically conductive connecting portion (not shown) which electrically connects the second wiring 34 to the substrate 10 is provided, and a fourth electrically conductive connecting portion (not shown) which electrically connects the second dummy wiring 42 to the substrate 10 is provided, so that it is possible to electrically connect the second dummy wiring 42 to the second wiring 34 through the substrate 10 made of metal (third electrically conductive connecting portion is cut in the production process of the wiring circuit board).

The design thickness of the second dummy wiring 42 is the same as the design thickness of the second wiring 34. The second dummy wiring 42 is thicker than the first dummy wiring 41. The thickness of the second dummy wiring 42 is, for example, 4 μm or more, preferably 6 μm or more, and for example, 60 μm or less, preferably 40 μm or less. The ratio of the thickness of the second dummy wiring 42 to the thickness of the first dummy wiring 41 is, for example, 1.05 or more, preferably 1.1 or more, more preferably 1.2 or more, and for example, 10 or less, preferably 5 or less, more preferably 3 or less.

The width of the second dummy wiring 42 (dimension in a direction perpendicular to the extending direction of the second dummy wiring 42) is preferably the same as the width of the second wiring 34. The width of the second dummy wiring 42 is, for example, 6 μm or more, preferably 9 μm or more, and for example, 110 μm or less, preferably 60 μm or less. The ratio of the width of the second dummy wiring 42 to the width of the first dummy wiring 41 is, for example, 1.05 or more, preferably 1.1 or more, more preferably 1.2 or more, and for example, 10 or less, preferably 7.5 or less, more preferably 5 or less.

The separation distance between the first dummy wiring 41 and the second dummy wiring 42 adjacent to each other is, for example, 5 μm or more, preferably 10 μm or more, and for example, 1000 μm or less, preferably 500 μm or less.

For example, as shown in FIG. 4, the above-described cover insulating layer 22 may be disposed on one surface in the thickness direction of the base insulating layer 21 so as to have a portion covering the first dummy wiring 41 and the second dummy wiring 42 (in FIG. 4, the first dummy wiring 41 and the second dummy wiring 42 covered with the cover insulating layer 22 are shown by the broken line).

The assembly sheet X having the above-described configuration may take a form of a roll in such a manner that the surface of the substrate 10 on which the wiring pattern 30 and the dummy wiring pattern 40 are formed is positioned on the outer diameter side. The assembly sheet X is transportable and storable in the form of the roll.

FIGS. 5A and 6C show one example of a method for producing the assembly sheet X. FIGS. 5A and 6C show the present production method as a change in a cross section corresponding to FIG. 3. In the present production method, the following various processes and treatments are carried out in a roll-to-roll method with respect to the workpiece taking the form of the roll, thereby producing the assembly sheet X.

In the present production method, first, as shown in FIG. 5A, the unprocessed substrate 10 without the opening portion G is prepared (preparing step). The substrate 10 has a first surface 10a to be processed, and a second surface 10b facing away therefrom, and includes the product regions R1 and the frame regions R2 which are separated by the subsequent formation of the opening portions G and are adjacent to each other. In the this step, the substrate 10 is prepared in the form of the roll.

Next, as shown in FIG. 5B, the base insulating layer 21 is pattern-formed on the first surface 10a of the substrate 10 (first insulating layer forming step). In the this step, first, a solution (varnish) of a photosensitive resin is applied onto the first surface 10a of the substrate 10 to be dried, thereby forming a coating film. Next, the coating film on the substrate 10 is subjected to an exposure process through a predetermined mask, a subsequent development process, and thereafter, if necessary, a bake process. In this way, the base insulating layer 21 is formed on the product regions R1 and the frame regions R2 of the substrate 10.

Next, as shown in FIG. 5C, the first wiring pattern 30A (the first wiring 31, the first terminal portion 32, the second terminal portion 33) and the first dummy wiring 41 are formed on the base insulating layer 21 (first conductive layer forming step: the first step). In the this step, the first wiring pattern 30A including the first wiring 31 is formed on one side in the thickness direction in the product region R1, while the first dummy wirings 41 are formed on one side in the thickness direction of the substrate 10 in the frame region R2.

Specifically, first, a seed layer is formed in, for example, a sputtering method so as to cover the first surface 10a of the substrate 10 and the base insulating layer 21 thereon. Examples of the material for the seed layer include Cr, Cu, Ni, Ti, and alloys of these (examples of the material for the seed layer to be described later include the same materials). Next, a resist pattern is formed on the seed layer. The resist pattern has an opening portion having a shape corresponding to a pattern shape of the first wiring pattern 30A and the first dummy wirings 41. In the formation of the resist pattern, for example, after a photosensitive resist film is attached onto the seed layer, a resist film is formed. Thereafter, the resist film is subjected to the exposure process through the predetermined mask, the subsequent development process, and thereafter, if necessary, the bake process (the same applies to the formation of the resist pattern to be described later). Next, a conductive material such as copper is deposited in the opening portion of the resist pattern using a plating solution by the electrolytic plating method. Next, the resist pattern is removed by etching. Next, a portion exposed by resist pattern removal in the seed layer is removed by the etching. As described above, it is possible to form the first wiring pattern 30A (the first wiring 31, the first terminal portion 32, the second terminal portion 33), and the first dummy wirings 41 concurrently.

In the this step, the first wiring 31 is formed on the product region R1, while the first dummy wirings 41 are formed on the frame region R2 adjacent to the product region R1 at the further outside of the first wiring 31 located at the outermost side of the first wirings 31 formed on the product region R1 (the outermost first wiring 31a). Such a step is suitable for suppressing a local increase in the concentration of the conductive material at the outermost first wiring 31a forming site and its vicinity, and suppressing a deposition amount of the conductive material of the outermost first wiring 31a not much exceeding the deposition amount of the conductive material of the other first wirings 31 in a plating solution used in the above-described electrolytic plating method. That is, the this step is suitable for forming the first wirings 31, while suppressing a thickness variation of the first wirings 31.

In the present production method, next, as shown in FIG. 6A, the second wiring pattern 30B (the second wiring 34, the third terminal portion 35, the fourth terminal portion 36) and the second dummy wiring 42 are formed on the base insulating layer