1 and connected to the first electrode ET1, and the other end or another end portion of the light-emitting element LD may be integral with the second electrode ET2 and connected to the second electrode ET2. The first power source VDD and the second power source VSS may have different potentials. A potential difference between the first power source VDD and the second power source VSS may be set to be greater than or equal to a threshold voltage of the light-emitting element LD during an emission period of the pixel PXL.

The light-emitting element LD may constitute an effective light source of the light-emitting unit EMU. The light-emitting element LD may emit light at luminance corresponding to a driving current supplied through the pixel circuit PXC. For example, during each frame period, the pixel circuit PXC may supply a driving current corresponding to a gradation value of corresponding frame data to the light-emitting unit EMU. The driving current supplied to the light-emitting unit EMU may flow in the light-emitting element LD. Accordingly, while the light-emitting element LD emits light at luminance corresponding to the driving current, the light-emitting unit EMU may emit light.

The pixel circuit PXC may be connected to a scan line Si and a data line Dj of the pixel PXL. As an example, in case that the pixel PXL is disposed in an i^throw and a j^thcolumn of a display area DA (wherein i is a natural number and j is a natural number), the pixel circuit PXC of the pixel PXL may be connected to an i^thscan line Si and a i^thdata line Dj of the display area DA. According to embodiments, the pixel circuit PXC may include first and second transistors T1 and T2 and a storage capacitor Cst.

A first terminal of the first transistor T1 (driving transistor) may be connected to the first power source VDD, and a second terminal thereof may be electrically connected to the light-emitting element LD. A gate electrode of the first transistor T1 may be connected to a first node N1. The first transistor T1 controls an amount of a driving current supplied to the light-emitting element LD in response to a voltage of the first node N1.

A first terminal of the second transistor T2 (switching transistor) may be connected to the j^thdata line Dj, and a second terminal thereof may be connected to the first node N1. Here, the first terminal and the second terminal of the second transistor T2 may be different terminals, and for example, in case that the first terminal is a source electrode, the second terminal may be a drain electrode. A gate electrode of the second transistor T2 may be connected to the i^thscan line Si.

In case that a scan signal having a voltage, at which the second transistor T2 may be turned on, is supplied from the i^thscan line Si, the second transistor T2 may be turned on to electrically connects the j^thdata line Dj and the first node N1. A data signal of a corresponding frame may be supplied to the j^thdata line Dj, and thus, the data signal may be transmitted to the first node N1. The data signal transmitted to the first node N1 may be charged in the storage capacitor Cst.

The storage capacitor Cst may be charged with a voltage corresponding to a data signal supplied to the first node N1 and may maintain the charged voltage until a data signal of a next frame is supplied.

Although FIG. 2 illustrates the pixel circuit PXC including the second transistor T2 for transmitting a data signal into the pixel PXL, the storage capacitor Cst for storing the data signal, and the first transistor T1 for supplying a driving current corresponding to the data signal to the light-emitting element LD, the disclosure is not necessarily limited thereto, and the structure of the pixel circuit PXC may be variously changed. As an example, the pixel circuit PXC may further additionally include other circuit elements such as at least one transistor element of a transistor element for compensating for a threshold voltage of the first transistor T1, a transistor element for initializing the first node N1, and/or a transistor element for controlling emission times of the light-emitting elements LD, and a boosting capacitor for boosting a voltage of the first node N1. The first and second transistors T1 and T2 of the pixel circuit PXC are not limited to FIG. 2 and may be variously changed to n-channel metal oxide semiconductors (NMOS) or p-channel metal oxide semiconductors (PMOSs).

FIG. 3 is a schematic cross-sectional view illustrating pixels according to one embodiment.

FIG. 3 schematically illustrates a cross-sectional structure of a first pixel PXL1, a second pixel PXL2, and a third pixel PXL3 which are adjacent to each other.

Referring to FIG. 3, a pixel PXL and a display device including the display device include a substrate SUB, bank patterns BNP disposed on the substrate SUB, light-emitting elements LD, color conversion layers CCL, color filter layers CFL, and protective layers PSV.

The substrate SUB may be a driving substrate including circuit elements or the like such as transistors constituting a pixel circuit PXC (see FIG. 2) of each pixel PXL. As an example, as the substrate SUB, a CMOS substrate made of a combination of an NMOS and a PMOS may be used, but the disclosure is not necessarily limited thereto.

The bank patterns BNP may be disposed at boundaries between the first pixel PXL1, the second pixel PXL2, and the third pixel PXL3 on the substrate SUB. Each of the bank patterns BNP may be provided in a shape extending in one direction or in a direction. For example, each of the bank patterns BNP may be provided on the substrate SUB in a shape extending in a third direction (Z-axis direction) from the substrate SUB. It is to be understood that the figures may also include a first direction (X-axis direction) and a second direction (Y-axis direction).

The bank patterns BNP may include at least one reflective material. The bank patterns BNP may reflect light emitted from the light-emitting elements LD to improve the luminous efficiency of a display panel PNL. Also, the bank patterns BNP may include at least one light blocking material to prevent color mixing between adjacent pixels PXL. According to embodiments, the bank patterns BNP may include an organic material such as an acrylic-based resin, an epoxy resin, a phenolic resin, a polyamide-based resin, a polyimide-based resin, a polyester-based resin, a polyphenylene sulfide-based resin, or benzocyclobutene (BCB). However, the disclosure is not necessarily limited thereto, and the bank patterns BNP may include at least one selected from various types of inorganic materials such as silicon oxide (SiO_x), silicon nitride (SiN_x), silicon oxynitride (SiO_xN_y), aluminum nitride (AlN_x), aluminum oxide (AlO_x), zirconium oxide (ZrO_x), hafnium oxide (HfO_x), and titanium oxide (TiO_x). A reflective layer may be additionally formed on surfaces (for example, sidewalls) of the bank patterns BNP so as to improve luminous efficiency.

The light-emitting elements LD may be respectively disposed in the first to third pixels PXL1, PXL2, and PXL3. The light-emitting elements LD may be disposed between the bank patterns BNP on the substrate SUB.

Each of the light-emitting elements LD may be provided in various shapes. As an example, the light-emitting elements LD may have a rod-like shape or bar-like shape which is long in the third direction (Z-axis direction) (for example, has an aspect ratio greater than one), but the disclosure is not necessarily limited thereto. For example, each of the light-emitting elements LD may have a polygonal column shape in which a diameter of one end or an end portion is different from a diameter of the other end or another end portion. The light-emitting elements LD may be light-emitting diodes (LEDs) manufactured in a micro-size to such an extent as to have a diameter and/or a length ranging from a nanoscale to a microscale. However, the disclosure is not necessarily limited thereto, and the size of the light-emitting element LD may be variously changed to meet the requirements (or design conditions) of a lighting device or a display device to which the light-emitting element LD is applied. It is to be understood that the shapes described herein may also include shapes substantial to the described shapes.

The light-emitting elements LD may each include a first semiconductor layer L1, a second semiconductor layer L3, and an active layer L2 interposed between the first semiconductor layer L1 and the second semiconductor layer L3. As an example, the first semiconductor layer L1, the active layer L2, and the second semiconductor layer L3 of the light-emitting elements LD may be sequentially stacked each other on the substrate SUB in the third direction (Z-axis direction).

The first semiconductor layer L1 of the light-emitting elements LD may include, for example, at least one p-type semiconductor layer. For example, the first semiconductor layer L1 of the light-emitting elements LD may include a p-type semiconductor layer which may include at least one semiconductor material selected from GaN, InAlGaN, AlGaN, InGaN, AlN, and InN and may be doped with a first conductivity-type dopant (or a p-type dopant) including at least one selected from zinc (Zn), iron (Fe), magnesium (Mg), beryllium (Be), cadmium (Cd), silver (Ag), carbon (C), mercury (Hg), lithium (Li), and calcium (Ca). As an example, the first semiconductor layer L1 of the light-emitting elements LD may include a GaN semiconductor material doped with the first conductivity-type dopant (or a p-type dopant), but the disclosure is not necessarily limited thereto. Various materials may constitute the first semiconductor layer L1 of the light-emitting elements LD.

The active layer L2 of the light-emitting elements LD may have any one structure of a single well structure, a multi-well structure, a single quantum well structure, a multi-quantum well (MQW) structure, a quantum dot structure, and a quantum line structure, but the disclosure is not necessarily limited thereto. The active layer L2 of the light-emitting elements LD may include GaN, InGaN, InAlGaN, AlGaN, or AlN. Various materials may constitute the active layer L2 of the light-emitting elements LD.

In case that a signal (or, a voltage) is applied to both end portions of the light-emitting elements LD, electrons and holes are combined to generate electron-hole pairs in the active layer L2, and thus, the light-emitting elements LD emit light. The light emission of each light-emitting element LD may be controlled using such a principle, and thus, the light-emitting element LD may be used as a light source of various light-emitting devices including the pixel PXL of the display device.

According to embodiments, an electron blocking layer may be further disposed between the active layer L2 and the first semiconductor layer L1 of the light-emitting elements LD. The electron blocking layer may block a flow in which electrons supplied from the second semiconductor layer L3 escape to the first semiconductor layer L1, thereby increasing an electron-hole recombination probability in the active layer L2. An energy bandgap of the electron blocking layer may be greater than an energy bandgap of the active layer L2 and/or the first semiconductor layer L1, but the disclosure is not necessarily limited thereto.

According to embodiments, a superlattice layer may be further disposed between the active layer L2 and the second semiconductor layer L3 of the light-emitting elements LD. The superlattice layer may relieve stress of the active layer L2 and the second semiconductor layer L3 to improve the quality of the light-emitting elements LD. As an example, the superlattice layer may be formed in a structure in which InGaN and GaN may be alternately stacked each other, but the disclosure is not necessarily limited thereto.

The second semiconductor layer L3 of the light-emitting elements LD may be disposed on the active layer L2 and may include a semiconductor layer that may be a different type from the first semiconductor layer L1. In one embodiment, the second semiconductor layer L3 of the light-emitting elements LD may include at least one n-type semiconductor layer. For example, the second semiconductor layer L3 of the light-emitting elements LD may be an n-type semiconductor layer which may include any one semiconductor material selected from GaN, InAlGaN, AlGaN, InGaN, AlN, and InN and may be doped with a second conductivity-type dopant (or an n-type dopant) including at least one selected from silicon (Si), tin (Sn), tellurium (Te), selenium (Se), sulfur (S), oxygen (O), titanium (Ti), and germanium (Ge). As an example, the second semiconductor layer L3 of the light-emitting elements LD may include a GaN semiconductor material doped with the second conductivity-type dopant (or an n-type dopant). However, the material constituting the second semiconductor layer L3 of the light-emitting elements LD is not limited thereto, and various materials may constitute the second semiconductor layer L3 of the light-emitting elements LD.

First electrodes ET1 may be disposed between the light-emitting elements LD and the substrate SUB. For example, the first electrode ET1 may be disposed between the first semiconductor layer L1 of the light-emitting elements LD and the substrate SUB, and the first semiconductor layer L1 of the light-emitting elements LD may be electrically connected to the first electrode ET1. The first electrode ET1 may include a metal or a metal oxide. For example, the first electrode ET1 may include one elected from copper (Cu), gold (Au), silver (Ag), chromium (Cr), titanium (Ti), aluminum (Al), nickel (Ni), indium (In), tin (Sn), and an oxide or an ally thereof, but the disclosure is not necessarily limited thereto.

According to embodiments, an insulating film INS may be provided on surfaces of the light-emitting elements LD and/or the bank patterns BNP. The insulating film INS may be provided on side surfaces of the light-emitting elements LD and/or the bank patterns BNP. The insulating film INS may prevent an electrical short circuit that may occur due to the active layer L2 of the light-emitting elements LD contacting conductive materials other than the first and second semiconductor layers L1 and L3. The insulating film INS may minimize surface defects of the light-emitting elements LD, thereby improving the lifespan and luminous efficiency of the light-emitting elements LD.

The insulating film INS may cover or overlap the side surfaces of the light-emitting elements LD and may be partially removed to expose upper surfaces of the light-emitting elements LD. As an example, the insulating film INS may cover or overlap the side surfaces of the light-emitting elements LD and may be partially removed to expose the second semiconductor layer L3 of the light-emitting elements LD.

The insulating film INS may include silicon oxide (SiO_x), silicon nitride (SiN_x), silicon oxynitride (SiO_xN_y), silicon oxycarbide (SiO_xC_y), aluminum oxide (AlO_x), aluminum nitride (AlN_x), zirconium oxide (ZrO_x), hafnium oxide (HfO_x), or titanium oxide (TiO_x), but the disclosure is not necessarily limited thereto.

A second electrode ET2 may be disposed on the light-emitting elements LD. The second electrode ET2 may be disposed on or directly disposed on the upper surfaces of the light-emitting elements LD exposed by the insulating film INS and may contact the second semiconductor layers L3 of the light-emitting elements LD. The second electrode ET2 may be disposed over the first to third pixels PXL1, PXL2, and PXL3.

The second electrode ET2 may be made of various transparent conductive materials. As an example, the second electrode ET2 may include at least one selected from various transparent conductive materials such as indium tin oxide (ITO), indium zinc oxide (IZO), indium tin zinc oxide (ITZO), aluminum zinc oxide (AZO), gallium zinc oxide (GZO), zinc tin oxide (ZTO), and gallium tin oxide (GTO) and may be implemented to be substantially transparent or semi-transparent so as to satisfy transmittance. Accordingly, light emitted from the light-emitting elements LD may pass through the second electrode ET2 to be emitted to the outside of the display panel PNL.

The color conversion layers CCL may be disposed on the light-emitting elements LD. The color conversion layer CCL may be disposed between the bank patterns BNP. The color conversion layer CCL may be provided in a space or an opening defined by the bank patterns BNP.

The color conversion layers CCL may include a first color conversion layer CC1 disposed on the first pixel PXL1, a second color conversion layer CC2 disposed in the second pixel PXL2, and a scattering layer LS disposed in the third pixel PXL3.

In one embodiment, the first to third pixels PXL1, PXL2, and PXL3 may include the light-emitting elements LD that emit light having a same color. For example, the first to third pixels PXL1, PXL2, and PXL3 may include the light-emitting elements LD that emit light having a third color (or blue). The color conversion layer CCL including color conversion particles may be disposed in each of the first to third pixels PXL1, PXL2, and PXL3 to display a full-color image.

In one embodiment, in case that the first pixel PXL1 is a red pixel, the first color conversion layer CC1 may include first quantum dots that convert blue light emitted from a blue light-emitting element into red light. The first quantum dots may absorb blue light and shift a wavelength according to an energy transition to emit red light. In case that the first pixel PXL1 is a different color pixel, the first color conversion layer CC1 may include the first quantum dots corresponding to the color of the first pixel PXL1.

In one embodiment, in case that the second pixel PXL2 is a green a different color pixel, the second color conversion layer CC2 may include second quantum dots that the blue light emitted from the blue light-emitting element into green light. The second quantum dots may absorb blue light and shift a wavelength according to an energy transition to emit green light. In case that the second pixel PXL2 is a different color pixel, the second color conversion layer CC2 may include the second quantum dots corresponding to a color of the second pixel PXL2.

In one embodiment, blue light having a relatively short wavelength in a visible light region is incident on each of the first quantum dots and the second quantum dots, thereby increasing absorption coefficients of the first quantum dots and the second quantum dots. Accordingly, finally, efficiency of light emitted from the first and second pixels PXL1 and PXL2 can be increased, and concurrently, excellent color reproducibility can be secured. A light-emitting unit EMU of the first, second, and third pixels PXL1, PXL2, and PXL3 may be formed using a same color light-emitting elements LD (for example, the blue light-emitting elements LD), thereby increasing the manufacturing efficiency of the display device.

The scattering layer LS may be provided to efficiently use the light having the third color (or blue) emitted from the light-emitting element LD. As an example, in case that the light-emitting element LD is a blue light-emitting element that emits blue light and the third pixel PXL3 is a blue pixel, the scattering layer LS may include scatterers or light scattering particles to efficiently use light emitted from the light-emitting element LD.

For example, the scattering layer LS may include scatterers dispersed in a matrix material such as a base resin. As an example, the scattering layer LS may include a scattering material such as silica, but the structural material of the scatterer is not limited thereto. The scatterer may not be selectively disposed only in the third pixel PXL3 but may also be included in the first color conversion layer CC1 or the second color conversion layer CC2. According to embodiments, the scattering layer LS may be omitted or a transparent polymer may be provided instead of the scattering layer LS.

The color filter layer CFL may be disposed on the color conversion layer CCL. The color filter layer CFL may include a color filter CF1 or CF2 corresponding to a color of each pixel PXL.

The color filter layers CFL may include a first color filter CF1 disposed in the first pixel PXL1 to transmit light emitted from the first pixel PXL1 and a second color filter CF2 disposed in the second pixel PXL2 to selectively transmit light emitted from the second pixel PXL2.

In one embodiment, the first color filter CF1 may be a red color filter and the second color filter CF2 may be a green color filter, but the disclosure is not limited thereto. Hereinafter, in case that an arbitrary color filter of the first color filter CF1 and the second color filter CF2 is to be referred to or at least two color filters thereof are to be collectively referred to, a color filter “CF” will be referred to, or “color filters CF” will be referred to.

The first color filter CF1 may be disposed between the first color conversion layer CC1 and the protective layer PSV to be described below. As an example, the first color filter CF1 may be disposed between the first color conversion layer CC1 and a second protective layer PSV2 to be described below. The first color filter CF1 may overlap the light-emitting element LD and the first color conversion layer CC1 of the first pixel PXL1 in a third direction (Z-axis direction). The first color filter CF1 may include a color filter material that selectively transmits light having a first color (or red). For example, in case that the first pixel PXL1 is a red pixel, the first color filter CF1 may include a red color filter material.

The second color filter CF2 may be disposed between the second color conversion layer CC2 and the protective layer PSV to be described below. As an example, the second color filter CF2 may be disposed between the second color conversion layer CC2 and a third protective layer PSV3 to be described below. The second color filter CF2 may overlap the light-emitting element LD and the second color conversion layer CC2 of the second pixel PXL2 in the third direction (Z-axis direction). The second color filter CF2 may include a color filter material that selectively transmits light having a second color (or green). For example, in case that the second pixel PXL2 is a green pixel, the second color filter CF2 may include a green color filter material.

The protective layer PSV may be disposed on the color conversion layer CCL. The protective layer PSV may include the first to third protective layers PSV1, PSV2, and PSV3 which may be sequentially stacked each other.

The first protective layer PSV1 may be disposed in the third pixel PXL3. The first protective layer PSV1 may be disposed on the scattering layer LS of the third pixel PXL3. As an example, the first protective layer PSV1 may be formed on or directly formed on the scattering layer LS of the third pixel PXL3 to serve to protect the scattering layer LS.

In one embodiment, the first protective layer PSV1 may include openings at least partially exposing the first pixel PXL1 and/or the second pixel PXL2. The openings of the first protective layer PSV1 may be sequentially formed. As described above, in case that the protective layers PSV of the pixels PXL are sequentially opened, the color conversion layer CCL may be selectively injected into the opened pixel PXL. For example, the opening exposing the first pixel PXL1 may be formed in the first protective layer PSV1, and the first color conversion layer CC1 may be selectively injected into the first pixel PXL1 through the opening. The opening exposing the second pixel PXL2 may be formed in the first protective layer PSV1, and the second color conversion layer CC2 may be selectively injected into the second pixel PXL2 through the opening. In a process of injecting the color conversion layer CCL into the open pixel PXL, the first protective layer PSV1 may serve to cover or overlap and protect lower members of the remaining pixels PXL. Accordingly, since the color conversion layer CCL may be selectively injected into the corresponding pixel PXL in a state in which adjacent pixels PXL are masked or protected, processability can be improved. This will be described in detail below with reference to FIGS. 12 to 20.

The first protective layer PSV1 may include an inorganic material such as silicon oxide (SiO_x), silicon nitride (SiN_x), silicon oxynitride (SiO_xN_y), silicon oxycarbide (SiO_xC_y), aluminum oxide (AlO_x), aluminum nitride (AlN_x), zirconium oxide (ZrO_x), hafnium oxide (HfO_x), or titanium oxide (TiO_x), but the disclosure is not necessarily limited thereto.

According to embodiments, the first protective layer PSV1 may include an organic material such as an acrylic-based resin, an epoxy resin, a phenolic resin, a polyamide-based resin, a polyimide-based resin, a polyester-based resin, a polyphenylene sulfide-based resin, or BCB.

The second protective layer PSV2 may be disposed in the first pixel PXL1 and/or the third pixel PXL3. The second protective layer PSV2 may be disposed on the first color filter CF1 of the first pixel PXL1. As an example, the second protective layer PSV2 may be formed on or directly formed on the first color filter CF1 of the first pixel PXL1. The second protective layer PSV2 may be disposed on the first protective layer PSV1 of the third pixel PXL3. As an example, the second protective layer PSV2 may be formed on or directly formed on the first protective layer PSV1 of the third pixel PXL3.

In one embodiment, the second protective layer PSV2 may include an opening exposing the second pixel PXL2. As described above, in case that the second protective layer PSV2 covers or overlaps the first pixel PXL1 and/or the third pixel PXL3 and is partially opened to expose the second pixel PXL2, the second color conversion layer CC2 may be selectively injected into the second pixel PXL2. In a process of injecting the second color conversion layer CC2 into the second pixel PXL2, the second protective layer PSV2 may serve to cover or overlap and protect the remaining pixels PXL. Accordingly, since the second color conversion layer CC2 may be selectively injected into the second pixel PXL2 in a state in which adjacent pixels PXL are masked or protected, processability can be improved. This will be described in detail below with reference to FIGS. 12 to 20.

The second protective layer PSV2 may include an inorganic material such as silicon oxide (SiO_x), silicon nitride (SiN_x), silicon oxynitride (SiO_xN_y), silicon oxycarbide (SiO_xCy), aluminum oxide (AlO_x), aluminum nitride (AlN_x), zirconium oxide (ZrO_x), hafnium oxide (HfO_x), or titanium oxide (TiO_x), but the disclosure is not necessarily limited thereto.

According to embodiments, the second protective layer PSV2 may include an organic material such as an acrylic-based resin, an epoxy resin, a phenolic resin, a polyamide-based resin, a polyimide-based resin, a polyester-based resin, a polyphenylene sulfide-based resin, or BCB. The third protective layer PSV3 may be disposed over the first to third pixels PXL1, PXL2, and PXL3. The third protective layer PSV3 may be disposed on the second protective layer PSV2 of the first pixel PXL1 and/or the third pixel PXL3. As an example, the third protective layer PSV3 may be formed on or directly formed on the second protective layer PSV2 of the first pixel PXL1 and/or the third pixel PXL3. The third protective layer PSV3 may be disposed on the second color filter CF2 of the second pixel PXL2. As an example, the third protective layer PSV3 may be formed on or directly formed on the second color filter CF2 of the second pixel PXL2.

The third protective layer PSV3 may include an inorganic material such as silicon oxide (SiO_x), silicon nitride (SiN_x), silicon oxynitride (SiO_xN_y), silicon oxycarbide (SiO_xC_y), aluminum oxide (AlO_x), aluminum nitride (AlN_x), zirconium oxide (ZrO_x), hafnium oxide (HfO_x), or titanium oxide (TiO_x), but the disclosure is not necessarily limited thereto.

According to embodiments, the third protective layer PSV3 may include an organic material such as an acrylic-based resin, an epoxy resin, a phenolic resin, a polyamide-based resin, a polyimide-based resin, a polyester-based resin, a polyphenylene sulfide-based resin, or BCB.

As described above, in case that the first protective layer PSV1 and/or the second protective layer PSV2 are sequentially opened to selectively inject the color conversion layer CCL into the corresponding pixel PXL among the first to third pixels PXL1, PXL2, and PXL3, the protective layers PSV of the first to third pixels PXL1, PXL2, and PXL3 may have different thicknesses. For example, in case that the first color conversion layer CC1 is injected into the first pixel PXL1 and the second color conversion layer CC2 is injected into the second pixel PXL2, since the first protective layer PSV1 is opened in a process of injecting the first color conversion layer CC1 into the first pixel PXL1, the second protective layer PSV2 and the third protective layer PSV3 may be disposed in the first pixel PXL1. Since the first protective layer PSV1 and the second protective layer PSV2 are opened in a process of injecting the second color conversion layer CC2 into the second pixel PXL2, the third protective layer PSV3 may be disposed in the second pixel PXL2. Since a process of injecting a separate color conversion layer CCL may be omitted, all of the first to third protective layers PSV1, PSV2, and PSV3 may be disposed in the third pixel PXL3. For example, a thickness H3 of the protective layer PSV of the third pixel PXL3 in the third direction (Z-axis direction) may be greater than a thickness H1 of the protective layer PSV of the first pixel PXL1 in the third direction (Z-axis direction) and/or a thickness H2 of the protective layer PSV of the second pixel PXL2 in the third direction (Z-axis direction). The thickness H1 of the protective layer PSV of the first pixel PXL1 in the third direction (Z-axis direction) may be greater than the thickness H2 of the protective layer PSV of the second pixel PXL2 in the third direction (Z-axis direction). FIG. 3 illustrates a case in which the first color conversion layer CC1 is injected into the first pixel PXL1 and the second color conversion layer CC2 is injected into the second pixel PXL2, but the disclosure is not necessarily limited thereto. As an example, according to embodiments, the second color conversion layer CC2 may be injected into the second pixel PXL2, and the first color conversion layer CC1 may be injected into the first pixel PXL1. Since the first protective layer PSV1 is opened in a process of injecting the second color conversion layer CC2 into the second pixel PXL2, the second protective layer PSV2 and the third protective layer PSV3 may be disposed in the second pixel PXL2. Since the first protective layer PSV1 and the second protective layer PSV2 are opened in a process of injecting the first color conversion layer CC1 into the first pixel PXL1, the third protective layer PSV3 may be disposed in the first pixel PXL1. For example, the thickness H2 of the protective layer PSV of the second pixel PXL2 in the third direction (Z-axis direction) may be greater than the thickness H1 of the protective layer PSV of the first pixel PXL1 in the third direction (Z-axis direction).

According to the above-described embodiment, in a state in which adjacent pixels PXL are masked or protected with the protective layer PSV, only the protective layer PSV of the corresponding pixel PXL may be partially opened to selectively inject the color conversion layer CCL into the corresponding pixel PXL. For example, the color conversion layer CCL can be applied on an entire surface of the display panel PNL without separate alignment, thereby improving processability.

Hereinafter, other embodiments will be described. In the following embodiments, the same components as the above-described components will be denoted by the same reference numerals, and repetitive descriptions thereof may be omitted or simplified.

FIG. 4 is a schematic cross-sectional view illustrating a pixel according to an embodiment.

Referring to FIG. 4, an embodiment is different from an embodiment of FIGS. 1 to 3 in that a color filter layer CFL further may include a third color filter CF3 and light blocking layers BM may be further disposed at boundaries between a first pixel PXL1, a second pixel PXL2, and a third pixel PXL3.

The third color filter CF3 may be disposed in the third pixel PXL3 to selectively transmit light emitted from the third pixel PXL3. The third color filter CF3 may be disposed on a third protective layer PSV3. The third color filter CF3 may overlap a light-emitting element LD and a scattering layer LS of the third pixel PXL3 in a third direction (Z-axis direction). The third color filter CF3 may include a color filter material that selectively transmits light having a third color (or blue). For example, in case that the third pixel PXL3 is a blue pixel, the third color filter CF3 may include a blue color filter material.

According to embodiments, the light blocking layer BM may be further disposed on the third protective layer PSV3. The light blocking layers BM are further disposed at the boundaries between the first pixel PXL1, the second pixel PXL2, and the third pixel PXL3. For example, the light blocking layers BM may be provided on bank patterns BNP and overlap the bank patterns BNP in the third direction (Z-axis direction). As described above, in case that the light blocking layers BM are formed at the boundaries between the first pixel PXL1, the second pixel PXL2, and the third pixel PXL3, color mixing defects visible from the front or side of a display device may be more effectively improved. The material of the light blocking layer BM is not particularly limited and may include various light blocking materials.

Since the light-emitting element LD, a color conversion layer CCL, the color filter layer CFL, and/or a protective layer PSV have been described in detail with reference to FIGS. 1 to 3, overlapping details may be omitted.

FIG. 5 is a schematic cross-sectional view illustrating a pixel according to an embodiment.

Referring to FIG. 5, an embodiment is different from an embodiment of FIGS. 1 to 3 in that bank patterns BNP may be disposed on a second electrode ET2.

For example, after an insulating film INS and a second electrode ET2 are first formed on light-emitting elements LD, the bank patterns BNP may be formed on the second electrode ET2.

The insulating film INS may be provided on side surfaces of the light-emitting elements LD. The insulating film INS may cover or overlap the side surfaces of the light-emitting elements LD and may be partially removed to expose upper surfaces of the light-emitting elements LD. As an example, the insulating film INS may cover or overlap the side surfaces of the light-emitting elements LD and may be partially removed to expose second semiconductor layers L3 of the light-emitting elements LD.

The second electrode ET2 may be disposed on the insulating film INS. The second electrode ET2 may be disposed on or directly disposed on the upper surfaces of the light-emitting elements LD exposed by the insulating film INS and may contact the second semiconductor layers L3 of the light-emitting elements LD. The second electrode ET2 may be disposed over the first to third pixels PXL1, PXL2, and PXL3.

The bank patterns BNP may be formed on the second electrode ET2. The bank patterns BNP may be disposed at the boundaries between the first pixel PXL1, the second pixel PXL2, and the third pixel PXL3 on the second electrode ET2.

A color conversion layer CCL may be disposed between the bank patterns BNP. The color conversion layer CCL may be disposed on the second electrode ET2 between the bank patterns BNP.

Since the light-emitting element LD, the color conversion layer CCL, a color filter layer CFL, and/or a protective layer PSV have been described in detail with reference to FIGS. 1 to 3, overlapping details may be omitted.

FIG. 6 is a schematic cross-sectional view illustrating a pixel according to an embodiment.

Referring to FIG. 6, an embodiment is different from an embodiment of FIGS. 1 to 3 in that bank patterns BNP may include a same material or a similar material as light-emitting elements LD.

The bank patterns BNP may each include a first semiconductor layer B1, a second semiconductor layer B3, and an active layer B2 interposed between the first semiconductor layer B1 and the second semiconductor layer B3. The first semiconductor layer B1, the active layer B2, and/or the second semiconductor layer B3 of the bank patterns BNP may include the same materials or similar materials as a first semiconductor layer L1, an active layer L2, and/or a second semiconductor layer L3 of the light-emitting elements LD, respectively. The first semiconductor layer L1, the active layer L2, and/or the second semiconductor layer of the light-emitting elements LD may be simultaneously formed in a same process as the first semiconductor layer B1, the active layer B2, and/or the second semiconductor layer B3 of the bank patterns BNP, respectively. Accordingly, a manufacturing process of a display device can be simplified to secure process economical efficiency. This will be described in detail below with reference to FIGS. 24 and 25.

The first semiconductor layer B1, the active layer B2, and the second semiconductor layer B3 of the bank patterns BNP may be sequentially stacked each other on a substrate SUB in a third direction (Z-axis direction).

The first semiconductor layer B1 of the bank patterns BNP may include, for example, at least one p-type semiconductor layer. For example, the first semiconductor layer B1 of the bank patterns BNP may include a p-type semiconductor layer which may include at least one semiconductor material selected from GaN, InAlGaN, AlGaN, InGaN, AlN, and InN and may be doped with a first conductivity-type dopant (or a p-type dopant) including at least one selected from zinc (Zn), iron (Fe), magnesium (Mg), beryllium (Be), cadmium (Cd), silver (Ag), carbon (C), mercury (Hg), lithium (Li), and calcium (Ca). As an example, the first semiconductor layer B1 of the bank patterns BNP may include a GaN semiconductor material doped with the first conductivity-type dopant (or a p-type dopant), but the disclosure is not necessarily limited thereto. Various materials may constitute the first semiconductor layer B1 of the bank patterns BNP.

The active layer B2 of the bank patterns BNP may have any one structure of a single well structure, a multi-well structure, a single quantum well structure, an MQW structure, a quantum dot structure, and a quantum line structure, but the disclosure is not necessarily limited thereto. The active layer B2 of the bank patterns BNP may include GaN, InGaN, InAlGaN, AlGaN, or AlN. Various materials may constitute the active layer B2 of the bank patterns BNP.

The second semiconductor layer B3 of the bank patterns BNP may be disposed on the active layer B2 and may include a semiconductor layer that may be a different type from the first semiconductor layer B1. In one embodiment, the second semiconductor layer B3 of the bank patterns BNP may include at least one n-type semiconductor layer. For example, the second semiconductor layer B3 of the bank patterns BNP may be an n-type semiconductor layer which may include any one semiconductor material selected from GaN, InAlGaN, AlGaN, InGaN, AlN, and InN and may be doped with a second conductivity-type dopant (or an n-type dopant) including at least one selected from silicon (Si), tin (Sn), tellurium (Te), selenium (Se), sulfur (S), oxygen (O), titanium (Ti), and germanium (Ge). As an example, the second semiconductor layer B3 of the bank patterns BNP may include a GaN semiconductor material doped with the second conductivity-type dopant (or an n-type dopant). However, the material constituting the second semiconductor layer L3 of the bank patterns BNP is not limited thereto, and various materials may constitute the second semiconductor layer L3 of the bank patterns BNP.

According to embodiments, an electrode layer EL may be further disposed between the substrate SUB and the bank patterns BNP. The electrode layer EL may include a same material or a similar material as the first electrode ET1 described above. For example, the electrode layer EL may include a metal or a metal oxide. As an example, the electrode layer EL may include one elected from copper (Cu), gold (Au), silver (Ag), chromium (Cr), titanium (Ti), aluminum (Al), nickel (Ni), indium (In), tin (Sn), and an oxide or an alloy thereof, but the disclosure is not necessarily limited thereto. The electrode layer EL and the first electrode ET1 may be simultaneously formed in a same process, but the disclosure is not necessarily limited thereto.

Since the light-emitting element LD, a color conversion layer CCL, a color filter layer CFL, and/or a protective layer PSV have been described in detail with reference to FIGS. 1 to 3, overlapping details may be omitted.

FIG. 7 is a schematic cross-sectional view illustrating a pixel according to an embodiment.

Referring to FIG. 7, an embodiment is different from an embodiment of FIGS. 1 to 3 in that color filter layers CFL and/or light blocking layers BM may be disposed on a protective layer PSV.

The protective layer PSV may be disposed on a color conversion layer CCL. For example, the first protective layer PSV1 may be disposed on a scattering layer LS of a third pixel PXL3. As an example, a first protective layer PSV1 may be formed on or directly formed on the scattering layer LS of the third pixel PXL3 to serve to protect the scattering layer LS.

A second protective layer PSV2 may be disposed on a first color conversion layer CC1 of a first pixel PXL1. As an example, the second protective layer PSV2 may be formed on or directly formed on the first color conversion layer CCL1 of the first pixel PXL1. The second protective layer PSV2 may be disposed on the first protective layer PSV1 of the third pixel PXL3. As an example, the second protective layer PSV2 may be formed on or directly formed on the first protective layer PSV1 of the third pixel PXL3.

A third protective layer PSV3 may be disposed on a second color conversion layer CC2 of a second pixel PXL2. As an example, the third protective layer PSV3 may be formed on or directly formed on the second color conversion layer CC2 of the second pixel PXL2. The third protective layer PSV3 may be disposed on the second protective layer PSV2 of the first pixel PXL1 and/or the third pixel PXL3. As an example, the third protective layer PSV3 may be formed on or directly formed on the second protective layer PSV2 of the first pixel PXL1 and/or the third pixel PXL3.

The color filter layer CFL may be disposed on the third protective layer PSV3. For example, first to third color filters CF1, CF2, and CF3 may be disposed in the first to third pixels PXL1, PXL2, and PXL3 on the third protective layer PSV3, respectively. The first to third color filters CF1, CF2, and CF3 may be formed on or directly formed on the third protective layer PSV3.

According to embodiments, the light blocking layer BM may be further disposed on the third protective layer PSV3. The light blocking layers BM may be disposed at boundaries between the first pixel PXL1, the second pixel PXL2, and the third pixel PXL3. For example, the light blocking layers BM may be disposed between the first color filter CF1, the second color filter CF2, and the third color filter CF3. As described above, in case that the light blocking layers BM are formed at the boundaries between the first pixel PXL1, the second pixel PXL2, and the third pixel PXL3, color mixing defects visible from the front or side of a display device may be more effectively improved. The material of the light blocking layer BM is not particularly limited and may include various light blocking materials.

Since a light-emitting element LD, the color conversion layer CCL, the color filter layer CFL, and/or the protective layer PSV have been described in detail with reference to FIGS. 1 to 3, overlapping details may be omitted.

Subsequently, a method of manufacturing the display device according to the above-described embodiment will be described.

FIGS. 8 to 20 are schematic cross-sectional views of processes of a method of manufacturing a display device according to one embodiment. FIGS. 8 to 20 are schematic cross-sectional views for describing a method of manufacturing the display devices of FIGS. 3 and 4. Components substantially the same as those of FIGS. 3 and 4 are denoted by the same reference numerals, and detailed reference numerals are omitted.

First, referring to FIG. 8, light-emitting elements LD are provided in first to third pixels PXL1, PXL2, and PXL3 of a substrate SUB. The substrate SUB may be a driving substrate including circuit elements or the like such as transistors constituting a pixel circuit PXC (see FIG. 2) of each pixel PXL. The light-emitting elements LD may be provided in the form in which a first semiconductor layer L1, an active layer L2, and a second semiconductor layer L3 may be sequentially stacked each other on the substrate SUB in a third direction (Z-axis direction). First electrodes ET1 may be provided between the light-emitting elements LD and the substrate SUB. The light-emitting elements LD may be connected to or coupled to the substrate SUB through the first electrodes ET1.

Referring to FIG. 9, bank patterns BNP are provided at boundaries between the first pixel PXL1, the second pixel PXL2, and the third pixel PXL3. The bank patterns BNP may be formed between the light-emitting elements LD. The bank patterns BNP may include at least one reflective material. The bank patterns BNP may reflect light emitted from the light-emitting elements LD to improve the luminous efficiency of a display panel PNL. The bank patterns BNP may include at least one light blocking material to prevent color mixing between adjacent pixels PXL. However, the disclosure is not necessarily limited thereto, and the material of the bank patterns BNP may be variously changed according to embodiments.

Referring to FIG. 10, an insulating film INS and a second electrode ET2 are provided on the light-emitting elements LD and/or the bank patterns BNP. The insulating film INS may be formed on side surfaces of the light-emitting elements LD and/or the bank patterns BNP. The insulating film INS may prevent an electrical short circuit that may occur due to the active layer L2 of the light-emitting elements LD contacting conductive materials other than the first and second semiconductor layers L1 and L3. The insulating film INS may minimize surface defects of the light-emitting elements LD, thereby improving the lifespan and luminous efficiency of the light-emitting elements LD.

The second electrode ET2 may be formed on the insulating film INS. The second electrode ET2 may be formed on or directly formed on the upper surfaces of the light-emitting elements LD exposed by the insulating film INS and may contact the second semiconductor layers L3 of the light-emitting elements LD. The second electrode ET2 may be formed over the first to third pixels PXL1, PXL2, and PXL3.

Referring to FIG. 11, organic layers OL are provided between the bank patterns BNP. The organic layers OL may be disposed on the light-emitting elements LD between the bank patterns BNP.

The organic layer OL may be disposed in each of the first to third pixels PXL1, PXL2, and PXL3. The organic layers OL of some or a number of pixels PXL among the first to third pixels PXL1, PXL2, and PXL3 may be sequentially removed in a subsequent process to provide a space in which a color conversion layer CCL may be provided. The organic layer OL of at least one of the first to third pixels PXL1, PXL2, and PXL3 may function as a scattering layer LS (see FIG. 3). To this end, the organic layer OL may include a same material or a similar material as the scattering layer LS. As an example, the organic layer OL may include scatterers or light scattering particles so as to efficiently use light emitted from the light-emitting element LD. For example, the organic layer OL may include scatterers dispersed in a matrix material such as a base resin. As an example, the organic layer OL may include a scatterer such as silica, but the structural of the scatterer is not limited thereto. According to embodiments, the scatterer may be omitted, and the organic layer OL made of a transparent polymer may be provided.

Referring to FIG. 12, a first protective layer PSV1 is provided on the organic layer OL. The first protective layer PSV1 may be formed over the first to third pixels PXL1, PXL2, and PXL3. As an example, the first protective layer PSV1 may be formed on or directly formed on the organic layer OL to serve to protect the organic layer OL.

The first protective layer PSV1 may be made of an inorganic material such as silicon oxide (SiO_x), silicon nitride (SiN_x), silicon oxynitride (SiO_xN_y), silicon oxycarbide (SiO_xC_y), aluminum oxide (AlO_x), aluminum nitride (AlN_x), zirconium oxide (ZrO_x), hafnium oxide (HfO_x), or titanium oxide (TiO_x), but the disclosure is not necessarily limited thereto.

Referring to FIG. 13, the organic layer OL and the first protective layer PSV1 of the first pixel PXL1 are removed. As an example, the first protective layer PSV1 may be partially removed to form a first opening OP1 exposing the first pixel PXL1, and the organic layer OL of the first pixel PXL1 may be removed through the first opening OP1.

In a process of removing the organic layer OL and the first protective layer PSV1 of the first pixel PXL1, the remaining pixels PXL, for example, the second pixel PXL2 and the third pixel PXL3 may be covered or overlapped by the first protective layer PSV1. As an example, in the process of removing the organic layer OL and the first protective layer PSV1 of the first pixel PXL1, the organic layer OL of the second pixel PXL2 and the organic layer OL of the third pixel PXL3 may be protected by the first protective layer PSV1. For example, the first opening OP1 exposing the first pixel PXL1 may be formed in a state in which adjacent pixels PXL are masked or protected with the first protective layer PSV1.

Referring to FIG. 14, a first color conversion layer CC1 is provided between the bank patterns BNP of the first pixel PXL1 from which the organic layer OL and the first protective layer PSV1 are removed. The first color conversion layer CC1 may be selectively injected into the first pixel PXL1 through the first opening OP1 of the first protective layer PSV1. In a process of injecting the first color conversion layer CC1 into the opened first pixel PXL1, the first protective layer PSV1 may cover or overlap and protect the remaining pixels PXL. As an example, in the process of injecting the first color conversion layer CC1 into the first pixel PXL1, the first protective layer PSV1 may serve to protect the organic layers OL of the second pixel PXL2 and the third pixel PXL3. Accordingly, since the first color conversion layer CC1 may be selectively injected into the first pixel PXL1 in a state in which adjacent pixels PXL are masked or protected, processability can be improved.

Referring to FIG. 15, a first color filter CF1 is provided on the first color conversion layer CC1. The first color filter CF1 may be formed on or directly formed on the first color conversion layer CC1. The first color filter CF1 may overlap the light-emitting element LD and the first color conversion layer CC1 of the first pixel PXL1 in the third direction (Z-axis direction). The first color filter CF1 may include a color filter material that selectively transmits light having a first color (or red). For example, in case that the first pixel PXL1 is a red pixel, the first color filter CF1 may include a red color filter material.

Referring to FIG. 16, a second protective layer PSV2 is provided. The second protective layer PSV2 may be formed over the first to third pixels PXL1, PXL2, and PXL3. As an example, the second protective layer PSV2 may be formed on the first color conversion layer CC1 and the first color filter CF1 of the first pixel PXL1. The second protective layer PSV2 may be formed on or directly formed on the first color filter CF1 of the first pixel PXL1, but the disclosure is not necessarily limited thereto. The second protective layer PSV2 may be formed on the first protective layer PSV1 of the second pixel PXL2. The second protective layer PSV2 may be formed on or directly formed on the first protective layer PSV1 of the second pixel PXL2, but the disclosure is not necessarily limited thereto. The second protective layer PSV2 may be disposed on the first protective layer PSV1 of the third pixel PXL3. The second protective layer PSV2 may be formed on or directly formed on the first protective layer PSV1 of the third pixel PXL3, but the disclosure is not necessarily limited thereto.

The second protective layer PSV2 may be made of an inorganic material such as silicon oxide (SiO_x), silicon nitride (SiN_x), silicon oxynitride (SiO_xN_y), silicon oxycarbide (SiO_xC_y), aluminum oxide (AlO_x), aluminum nitride (AlN_x), zirconium oxide (ZrO_x), hafnium oxide (HfO_x), or titanium oxide (TiO_x), but the disclosure is not necessarily limited thereto.

Referring to FIG. 17, the organic layer OL, the first protective layer PSV1, and the second protective layer PSV2 of the second pixel PXL2 are removed. As an example, the first protective layer PSV1 and the second protective layer PSV2 may be partially removed to form a second opening OP2 exposing the second pixel PXL2, and the organic layer OL of the second pixel PXL2 may be removed through the second opening OP2.

In a process of removing the organic layer OL, the first protective layer PSV1, and the second protective layer PSV2 of the second pixel PXL2, the first pixel PXL1 and the third pixel PXL3 may be covered or overlapped by the second protective layer PSV2. For example, the second opening OP2 exposing the second pixel PXL2 may be formed in a state in which adjacent pixels PXL are masked or protected with the second protective layer PSV2.

Referring to FIG. 18, a second color conversion layer CC2 is provided between the bank patterns BNP of the second pixel PXL2 from which the organic layer OL, the first protective layer PSV1, and the second protective layer PSV2 are removed. The second color conversion layer CC2 may be selectively injected into the second pixel PXL2 through the second opening OP2 of the second protective layer PSV2. In a process of injecting the second color conversion layer CC2 into the exposed second pixel PXL2, the second protective layer PSV2 may serve to cover or overlap and protect the remaining pixels PXL. As an example, in the process of injecting the second color conversion layer CC2 into the second pixel PXL2, the second protective layer PSV2 may serve to protect the first pixel PXL1 and the third pixel PXL3. Accordingly, since the second color conversion layer CC2 may be selectively injected into the second pixel PXL2 in a state in which adjacent pixels PXL are masked or protected, processability can be improved as described above.

Referring to FIG. 19, a second color filter CF2 is provided on the second color conversion layer CC2. The second color filter CF2 may be formed on or directly formed on the second color conversion layer CC2. The second color filter CF2 may overlap the light-emitting element LD and the second color conversion layer CC2 of the second pixel PXL2 in the third direction (Z-axis direction). The second color filter CF2 may include a color filter material that selectively transmits light having a second color (or green). For example, in case that the second pixel PXL2 is a green pixel, the second color filter CF2 may include a green color filter material.

Referring to FIG. 20, the display device illustrated in FIG. 3 may be completed by forming a third protective layer PSV3 on the second protective layer PSV2.

The third protective layer PSV3 may be formed over the first to third pixels PXL1, PXL2, and PXL3. As an example, the third protective layer PSV3 may be formed on the second protective layer PSV2 of the first pixel PXL1. The third protective layer PSV3 may be formed on or directly formed on the second protective layer PSV2 of the first pixel PXL1, but the disclosure is not necessarily limited thereto. The third protective layer PSV3 may be formed on the second color filter CF2 of the second pixel PXL2. The third protective layer PSV3 may be formed on or directly formed on the second color filter CF2 of the second pixel PXL2, but the disclosure is not necessarily limited thereto. The third protective layer PSV3 may be formed on the second protective layer PSV2 of the third pixel PXL3. The third protective layer PSV3 may be formed on or directly formed on the second protective layer PSV2 of the third pixel PXL3, but the disclosure is not necessarily limited thereto.

The third protective layer PSV3 may be made of an inorganic material such as silicon oxide (SiO_x), silicon nitride (SiN_x), silicon oxynitride (SiO_xN_y), silicon oxycarbide (SiO_xC_y), aluminum oxide (AlO_x), aluminum nitride (AlN_x), zirconium oxide (ZrO_x), hafnium oxide (HfO_x), or titanium oxide (TiO_x), but the disclosure is not necessarily limited thereto.

Subsequently, the display device illustrated in FIG. 4 may be completed by forming a third color filter CF3 and a light blocking layer BM on the third protective layer PSV3.

The third color filter CF3 may be formed on or directly formed on the third protective layer PSV3 of the third pixel PXL3. The third color filter CF3 may overlap the light-emitting element LD and the organic layer OL of the third pixel PXL3 in the third direction (Z-axis direction). The third color filter CF3 may include a color filter material that selectively transmits light having a third color (or blue). For example, in case that the third pixel PXL3 is a blue pixel, the third color filter CF3 may include a blue color filter material.

According to embodiments, the light blocking layer BM may be further formed on the third protective layer PSV3. The light blocking layers BM may be disposed at boundaries between the first pixel PXL1, the second pixel PXL2, and the third pixel PXL3. For example, the light blocking layers BM may be provided on the bank patterns BNP and overlap the bank patterns BNP in the third direction (Z-axis direction). As described above, in case that the light blocking layers BM are formed at the boundaries between the first pixel PXL1, the second pixel PXL2, and the third pixel PXL3, color mixing defects visible from the front or side of a display device may be more effectively improved. The material of the light blocking layer BM is not particularly limited and may include various light blocking materials.

According to the above-described embodiment, in a state in which adjacent pixels PXL are masked or protected with a protective layer PSV, only the protective layer PSV of the corresponding pixel PXL may be partially opened to selectively inject the color conversion layer CCL into the corresponding pixel PXL. For example, the color conversion layer CCL can be applied on an entire surface of the display panel PNL without separate alignment, thereby improving processability.

FIGS. 21 to 23 are schematic cross-sectional views illustrating processes of a method of manufacturing a display device according to an embodiment. FIGS. 21 to 23 are schematic cross-sectional views for describing a method of manufacturing the display device of FIG. 5. Components substantially the same as those of FIG. 5 are denoted by the same reference numerals, and detailed reference numerals are omitted.

Referring to FIG. 21, light-emitting elements LD are provided in first to third pixels PXL1, PXL2, and PXL3 of a substrate SUB. The substrate SUB may be a driving substrate including circuit elements or the like such as transistors constituting a pixel circuit PXC (see FIG. 2) of each pixel PXL. The light-emitting elements LD may be provided in the form in which a first semiconductor layer L1, an active layer L2, and a second semiconductor layer L3 may be sequentially stacked each other on the substrate SUB in a third direction (Z-axis direction). First electrodes ET1 may be provided between the light-emitting elements LD and the substrate SUB. The light-emitting elements LD may be connected to or coupled to the substrate SUB through the first electrodes ET1.

Referring to FIG. 22, an insulating film INS and a second electrode ET2 are provided on the light-emitting elements LD. The insulating film INS may be formed on side surfaces of the light-emitting elements LD. The insulating film INS may prevent an electrical short circuit that may occur due to the active layer L2 of the light-emitting elements LD contacting conductive materials other than the first and second semiconductor layers L1 and L3. The insulating film INS may minimize surface defects of the light-emitting elements LD, thereby improving the lifespan and luminous efficiency of the light-emitting elements LD.

Referring to FIG. 23, bank patterns BNP are provided on the second electrode ET2. The bank patterns BNP may be formed at boundaries between the first pixel PXL1, the second pixel PXL2, and the third pixel PXL3 on the second electrode ET2. As an example, the bank patterns BNP may be formed between the light-emitting elements LD.

Organic layers OL are provided between the bank patterns BNP. Since a process of forming the organic layer OL, a color conversion layer CCL, and/or a color filter layer CFL has been described in detail with reference to FIGS. 11 to 20, overlapping details may be omitted.

FIGS. 24 and 25 are schematic cross-sectional views of processes of a method of manufacturing a display device according to an embodiment. FIGS. 24 and 25 are schematic cross-sectional views for describing a method of manufacturing the display device of FIG. 6. Components substantially the same as those of FIG. 6 are denoted by the same reference numerals, and detailed reference numerals are omitted.

First, referring to FIG. 24, a substrate SUB is provided, and light-emitting stacks 11, 12, and 13 are provided on the substrate SUB. The light-emitting stacks 11, 12, and 13 may be formed by growing seed crystals through an epitaxial method. According to embodiments, the light-emitting stacks 11, 12, and 13 may be formed through metal organic chemical vapor deposition (MOCVD) method. However, the disclosure is not necessarily limited thereto, the light-emitting stacks 11, 12, and 13 may be formed through various methods such as an electron beam deposition method, a physical vapor deposition (PVD) method, a chemical vapor deposition (CVD) method, a plasma laser deposition (PLD) method, a dual-type thermal evaporation method, and a sputtering method.

The light-emitting stacks 11, 12, and 13 may include a first semiconductor layer 11, an active layer 12, and a second semiconductor layer 13 which are epitaxially grown. The first semiconductor layer 11, the active layer 12, and the second semiconductor layer 13 may be sequentially provided on the substrate SUB in a third direction (Z-axis direction). The first semiconductor layer 11 may include, for example, at least one p-type semiconductor layer. For example, the first semiconductor layer 11 may include a p-type semiconductor layer which may include at least one semiconductor material selected from GaN, InAlGaN, AlGaN, InGaN, AlN, and InN and may be doped with a first conductivity-type dopant (or a p-type dopant) including at least one selected from zinc (Zn), iron (Fe), magnesium (Mg), beryllium (Be), cadmium (Cd), silver (Ag), carbon (C), mercury (Hg), lithium (Li), and calcium (Ca). As an example, the first semiconductor layer 11 may include a GaN semiconductor material doped with the first conductivity-type dopant (or a p-type dopant), but the disclosure is not necessarily limited thereto. Various materials may constitute the first semiconductor layer 11.

The active layer 12 may have any one structure of a single well structure, a multi-well structure, a single quantum well structure, an MQW structure, a quantum dot structure, and a quantum line structure, but the disclosure is not necessarily limited thereto. The active layer 12 include GaN, InGaN, InAlGaN, AlGaN, or AlN. Various materials may constitute the active layer 12.

The second semiconductor layer 13 may be disposed on the active layer 12 and may include a semiconductor layer which is a different type from the first semiconductor layer 11. In one embodiment, the second semiconductor layer 13 may include at least one n-type semiconductor layer For example, the second semiconductor layer 13 may be an n-type semiconductor layer which may include any one semiconductor material selected from GaN, InAlGaN, AlGaN, InGaN, AlN, and InN and may be doped with a second conductivity-type dopant (or an n-type dopant) including at least one selected from silicon (Si), tin (Sn), tellurium (Te), selenium (Se), sulfur (S), oxygen (O), titanium (Ti), and germanium (Ge). As an example, the second semiconductor layer 13 may include a GaN semiconductor material doped with the second conductivity-type dopant (or an n-type dopant). However, a material constituting the second semiconductor layer 13 is not limited thereto, and the second semiconductor layer 13 may be made of various materials.

According to embodiments, a conductive layer ETL may be further formed between the substrate SUB and the first semiconductor layer 11. The conductive layer ETL may include a metal or a metal oxide. As an example, the conductive layer ETL may include one elected from copper (Cu), gold (Au), silver (Ag), chromium (Cr), titanium (Ti), aluminum (Al), nickel (Ni), indium (In), tin (Sn), and an oxide or an alloy thereof, but the disclosure is not necessarily limited thereto.

Referring to FIG. 25, the light-emitting stacks 11, 12, and 13 may be etched to form light-emitting elements LD and bank patterns BNP. The bank patterns BNP may be disposed at boundaries between a first pixel PXL1, a second pixel PXL2, and a third pixel PXL3. The light-emitting elements LD may be formed in the first to third pixels PXL1, PXL2, and PXL3 between the bank patterns BNP. As an example, in a process of etching the light-emitting stacks 11, 12, and 13, the light-emitting elements LD and the bank patterns BNP having different thicknesses may be simultaneously formed using a difference in etch selectivity of a mask.

According to embodiments, in the process of etching the light-emitting stacks 11, 12, and 13, The conductive layer ETL may be separated into a first electrode ET1 and an electrode layer EL. As an example, the conductive layer ETL may be separated into the first electrode ET1 under or below the light-emitting elements LD and the electrode layer EL under or below the bank patterns BNP.

An insulating film INS and a second electrode ET2 are provided on the light-emitting elements LD and/or the bank patterns BNP. Since a process of forming the second electrode ET2, an organic layer OL, a protective layer PSV, a color conversion layer CCL, and/or a color filter layer CFL has been described in detail with reference to FIGS. 10 to 20, overlapping details may be omitted.

FIGS. 26 to 30 are schematic cross-sectional views of processes of a method of manufacturing a display device according to an embodiment.