102 that the semiconductor chip 104 covers. In some embodiments, the length L and width W of the semiconductor chip 104 are based on known dimensions of the semiconductor chip 104 prior to the semiconductor chip 104 being soldered to the substrate 102. In some embodiments, the length L and/or width W of the semiconductor chip 104 may correspond to an existing industry standard form factors. In other embodiments, at least one of the length L and/or width W may be determined after the semiconductor chip 104 has been soldered to the substrate 102 via the solder balls 110 and solder material 114.

Referring to FIGS. 1B-1C, the semiconductor chip 104 may be offset from the substrate by the solder joints 116. For example, the solder joints 116 may space the bottom surface 112 of the semiconductor chip 104 from the top planar surface 106 of the substrate 102. As such, there may be a space between the semiconductor chip 104 and substrate 102 where an underfill material may be deposited. The space between the semiconductor chip 104 and substrate 102 may be defined by the footprint of the semiconductor chip 104 (e.g., the length L and width W) and the standoff heights which are defined by one or more of the corresponding solder joints 116. For example, the space between the semiconductor chip 104 and substrate 102 may be calculated, or estimated, based on the length L and width W of the semiconductor chip 104 and at least one of the standoff heights (e.g., standoff heights S₁, S₂, and/or S₃).

In some embodiments, the amount of underfill material deposited within the space between the semiconductor chip 104 and substrate 102 may be dependent upon the shape and/or geometry of the solder joints 116. Put another way, the solder joints 116 are positioned within the space between the semiconductor chip 104 and substrate 102 and as such the amount of underfill material required to fill the space may be dependent upon the shape and/or geometry of the solder joints 116. For example, each solder joint 116 has a solder joint volume that is dependent upon the shape and/or geometry of the solder joint 116 and that fills a portion of the space between the semiconductor chip 104 and substrate 102. Put another way, each solder joint 116 has an associated solder joint volume that fills a portion of the space between the semiconductor chip 104 and substrate 102. In some embodiments, the solder joint volume of one or more of the solder joints 116 may be different from the solder joint volume of one or more other solder joints 116.

Referring to FIG. 2, there is shown a semiconductor device package, generally designated 200, that may be included with another exemplary embodiment of the present disclosure. The semiconductor device package 200 may be generally similar to the semiconductor device package 100, described above with reference to FIGS. 1A-1C, except that there is another semiconductor device included in the semiconductor device package 200. The semiconductor device package 200 may include a substrate 202, and a first semiconductor chip 204a and a second semiconductor chip 204b each electrically and physically connected to the substrate 202. The first semiconductor chip 204a may be electrically connected to the substrate 202 by a first plurality of solder joints 216a. Similarly, the second semiconductor chip 204b may be electrically connected to the substrate 202 by a second plurality of solder joints 216b. The solder joints 216a and 216b may be generally the same as the solder joints 116. For example, each of the solder joints 216a and 216b may formed in generally the same manner as the solder joints 116 as described above with reference to FIGS. 1A-1B.

In some embodiments, there are one or more first standoff heights S_abetween the substrate 202 and the first semiconductor chip 204a defined by one or more corresponding first solder joints 216a. In some embodiments, there may be a plurality of first standoff heights S_aeach being defined by a corresponding one of the first plurality of solder joints 216a. For example, each of the first solder joints 216a electrically connecting the first semiconductor chip 204a to the substrate 202 may define a corresponding first standoff height S_a. Similarly, there may be one or more second standoff heights S_bbetween the substrate 202 and the second semiconductor chip 204b that are defined by one or more corresponding second solder joints 216b. In some embodiments, there is a plurality of second standoff heights S_beach of which being defined by a corresponding one of the second plurality of solder joints 216b. A single first and second standoff height S_aand S_bare referenced in FIG. 2, however it will be understood that each of the solder joints 216a and 216b may define a first and second standoff height S_aand S_brespectively.

In some embodiments, one or more first standoff heights S_amay be different from one or more of the second standoff heights S_b. Put another way, the first semiconductor chip 204a may be offset from the substrate 202 by a distance that is not equal to the offset distance of the second semiconductor chip 204b from the substrate 202. In some embodiments, the one or more first standoff heights S_amay be averaged to determine an average first standoff height and similarly, the one or more second standoff heights S_bmay be averaged to determine an average second standoff height. In some embodiments, each of the first standoff heights S_amay be greater than any of the second standoff heights S_b, or vice versa. For example, the standoff height S_ahaving the lowest value of the first plurality of standoff heights S_amay be greater than the standoff height S_bhaving the greatest value of the second plurality of standoff heights S_b, or vice versa. In other embodiments, the standoff heights S_aand S_bmay be about the same as one another. Put another way, the offset of the first and second semiconductor devices 204a, 204b from the substrate 202 may be about the same or generally equal.

In some embodiments, each of the first and second semiconductor chips 204a, 204b may have a footprint defined in generally the same manner as the footprint of the semiconductor chip 104 shown and described above with reference to FIG. 1C. For example, the first semiconductor chip 204a may have a first footprint and the second semiconductor chip 204b may have a second footprint. The first footprint may be defined by the length L_aand width (not shown) of the first semiconductor chip 204a and the second footprint may be defined by the length L_band width (not shown) of the second semiconductor chip 204b. The widths of each of the first and second semiconductor chips 204a, 204b, although not shown, may be defined in generally the same manner as the width W shown and described above with reference to FIG. 1C.

In some embodiments, each of the semiconductor chips 204a, 204b defines a corresponding space between the substrate 202 and the respective first and second semiconductor chips 204a, 204b in generally the same manner as described above with reference to FIGS. 1B-1C. For example, there may be a first space between the first semiconductor chip 204a and the substrate 202 that is defined by one or more of the first standoff heights S_aand the footprint of the first semiconductor chip 204a. Similarly, there may be a second space between the second semiconductor chip 204b and the substrate 202 that is defined by one or more of the second standoff heights S_band the footprint of the second semiconductor chip 204b. As such, the space between the first semiconductor chip 204a and substrate 202 may be partially filled by the first plurality of solder joints 216a and the space between the second semiconductor chip 204b and substrate 202 may be partially filled by the second plurality of solder joints 216b.

It will be understood that although two semiconductor chips 204a, 204b are illustrated in FIG. 2 and a single semiconductor chip 104 is illustrated in FIGS. 1A-1C, the embodiments of the present disclosure are not limited to semiconductor device packages including one or two semiconductor chips. For example, the methods of the present disclosure, discussed in more detail below, may be performed on semiconductor device packages having one, two, three, four or more than four semiconductor chips included therewith.

Referring to FIG. 3, there is shown a schematic of a system, generally designated 300, for dispensing an underfill material on a semiconductor device package, in accordance with an exemplary embodiment of the present disclosure. The system 300 illustrated in FIG. 3 may be used with the semiconductor device package 100, however it will be understood that the system 300 may include the semiconductor device package 200 shown and described in FIG. 2. In some embodiments, the system 300 includes a reflow oven 302 for soldering the semiconductor chip 104 to the substrate 102. For example, the semiconductor chip 104 coupled to the substrate 102 via the solder material 114 and solder balls 110 may be placed within the reflow oven 302 and undergo a reflow soldering process, as described above, to form the solder joints 116 of the semiconductor device package 100. In other embodiments, the reflow oven 302 may be separate from the system 300 of the present disclosure.

The system 300 may include a server 304 having one or more memory units 306 communicatively coupled to at least one processor 308. The server 304 may include one or more computing servers that are configured to execute one or more programs. A program for execution on the server 304 refers to a collection of computer readable and executable code configured to perform one or more operations. In some embodiments, the one or more memory units 306 may be operable to store at least one program and the processor 308 may be configured to execute the at least one program to perform various operations included in the at least one program. In some embodiments, the server 304 may include one or more electronic storage means (e.g., a database or any other electronic storage device) for storing one or more calculated values.

In some embodiments, the at least one program, when executed by the processor 308, may cause the processor 308 to calculate at least one standoff height (e.g., standoff height S₁) between the substrate 102 and the semiconductor chip 104. For example, the system 300 may include a measurement device 310 that is communicatively coupled to the server 304 and configured to calculate the at least one standoff height S₁. Calculating the standoff height S₁may include measuring, via the measurement device 310, the standoff height S₁. In some embodiments, a plurality of standoff heights S₁may be calculated. In other embodiments, each standoff height S₁corresponding to each solder joint 116 may be calculated. In some embodiments, the calculated standoff height S₁may be transmitted from the measurement device to the server 304.

In some embodiments, the measurement device 310 is an image capture device that is configured to capture an image of the substrate 102 and semiconductor chip 104. The image captured by the image capture device may be used to calculate the at least one standoff height S₁. For example, the image capture device may transmit the image to the server 304 and the server 304, via the processor 308 and memory units 306, may be configured to calculate the standoff height S₁based on the received image. In some embodiments, the processor 308 may be configured to determine the shape, geometry and/or orientation of the solder joints 116 based on the image captured by the image capture device.

In some embodiments the measurement device 310 is a 3-dimensional (3D) x-ray device that is configured to generate a 3D x-ray of the substrate 102 and semiconductor chip 104. The 3D x-ray device may be communicatively coupled to the at least one processor 308, via the server 304. In some embodiments, the 3D x-ray device may generate the 3D x-ray and transmit it to the server 304. The server 304, via the processor 308, may be configured to calculate the at least one standoff height S₁based on the 3D x-ray generated by the 3D x-ray device. For example, the processor 308 may be configured to perform one or more analyses on the 3D x-ray in order to calculate the at least one standoff height S₁. In some embodiments, the processor 308 may be configured to determine the shape, geometry and/or orientation of the solder joints 116 based on the 3D x-ray generated by the 3D x-ray device.

In some embodiments, the measurement device 310 is a laser height sensing device configured to calculate the at least one standoff height S₁. In some embodiments, the laser height sensing device may be communicatively coupled to the processor 308 and configured to, in response to a request from the at least one processor 308, calculate the at least one standoff height S₁. In some embodiments, the laser height sensing device may transmit the calculated at least one standoff height S₁to the server 304.

In some embodiments, the measurement device 310 is a 3D automated optical inspection device configured to perform a 3D automated optical inspection of the substrate 102 and semiconductor chip 104. The 3D automated optical inspection device may be communicatively coupled to the at least one processor 308, via the server 304, such that data generated by the 3D automated optical inspection may be transmitted to the server 304. In some embodiments, the calculated at least one standoff height S₁may be based on the data generated by the performed 3D automated optical inspection. For example, the processor 308 may be configured to calculate the at least one standoff height S₁based on the received data generated by the performed 3D automated optical inspection. In other embodiments, the 3D automated optical inspection device may be configured to perform the 3D automated optical inspection and calculate the at least one standoff height S₁and transmit the calculated standoff height S₁to the processor 308. In some embodiments, the processor 308 may be configured to determine the shape, geometry and/or orientation of the solder joints 116 based on the 3D automated optical inspection performed by the 3D automated optical inspection device.

In some embodiments, the system 300 may include more than one measurement device 310 communicatively coupled to the server 304. In some embodiments, the system 300 may include any combination of the above-mentioned embodiments of the measurement device 310. For example, the system 300 may include any combination of image capture devices, 3D x-ray devices, laser height sensing devices, and 3D automated optical inspection devices. In some embodiments, the system 300 may include two or more of a single type of measurement device 310. For example, the system 300 may include two or more image capture devices each communicatively coupled to the processor 308.

In some embodiments, the at least one program, when executed by the processor 308, causes the processor 308 to determine, based on the calculated at least one standoff height S₁, a volume of underfill material 118 to fill the space between the substrate 102 and the semiconductor chip 104. For example, the processor 308 may determine the volume of underfill material 118 based on the footprint of the semiconductor chip 104 and the calculated at least one standoff height S₁. In some embodiments, the footprint of the semiconductor chip 104 may be a predetermined value based on the selected semiconductor device and/or industry standard form factors. The predetermined footprint value may be inputted by a user to system 300, and/or stored within one or more memory units 306. In other embodiments, system 300 may be configured to measure or calculate the footprint of semiconductor chip 104 (e.g., using data obtained from measurement device 310 or a separate measurement device). The determined volume of underfill material 118 may be a volume of underfill material 118 configured to substantially fill the space between the substrate 102 and the semiconductor chip 104.

In some embodiments, the determined volume of underfill material 118 may be based on, at least partially, the shape and/or geometry of the solder joints 116. For example, the data transferred to the server 304 by the measurement device 310 may include information relating to the shape, geometry, and/or orientation of the solder joints 116. As such, the volume of the space that is filled by one or more of the solder joints 116 may be calculated, via the processor 308, and used to determine the volume of underfill material 118. For example, the volume of the space between the substrate 102 and semiconductor chip 104 may be determined based on the calculated standoff height S₁and a known footprint (e.g., the length and width) of the semiconductor chip 104. The determined volume of the solder joints 116 may be subtracted from the determined volume of the space in order to determine a remaining volume for which the underfill material 118 may fill.

In some embodiments, determining the volume of the underfill material 118 may include the following steps: 1) multiplying the at least one standoff height S₁with the known footprint of the semiconductor chip 104, and 2) subtracting the volume of the solder joints 116 from the product calculated in step 1). In some embodiments, determining the volume of underfill material 118 may include the step 3) of adding an underfill material constant (e.g., a volume of underfill material required to substantially cover the side surfaces of the solder joints 116) to the calculation from step 2). In some embodiments, step 1) may include calculating an average of a plurality of standoff heights and multiplying the average by the known footprint of the semiconductor chip 104. The weight of the determined volume of the underfill material 118 may be determined by multiplying the determined volume of underfill material 118 by a known density of the underfill material 118. As such, the processor 308 may determine the volume of underfill material 118 and, in some embodiments, the weight of the underfill material 118 that is needed or necessary to be deposited on the substrate 102 in order to substantially fill the space between the substrate 102 and semiconductor chip 104.

In this manner, the remaining volume of the space to be filled by the underfill material may be accurately determined for a given semiconductor device package 100. By determining, the remaining volume to be filled for a given semiconductor device package, the volume of underfill material may be more accurately determined to achieve the desired coverage when compared to conventional methods which rely on estimations and/or that do not include any measurement of standoff height(s). In embodiments where the solder material 114 is an LTS paste, the risk of standoff height variations occurring increases and therefore the system 300 and methods discussed below of the present disclosure may reduce the risk of improper coverage of underfill material caused by variations in standoff height. In some embodiments, the system 300 may be used to calculate at least one standoff height and determine a volume of underfill material to achieve a desired coverage for a plurality of semiconductor device packages. For example, the system may calculate standoff heights for a plurality semiconductor device packages in batches, and determine, based on said calculations, a volume of underfill material for each package.

In some embodiments, the at least one program, when executed by the processor 308, may cause the processor 308 to cause an underfill dispensing device 312 to dispense the determined volume of underfill material 118. For example, the system 300 may include an underfill dispensing device 312 that is communicatively coupled to the processor 308 via the server 304. The processor 308 may transmit data to the underfill dispensing device 312, via server 304, that includes an indication of the determined volume of underfill material 118. The underfill dispensing device 312, in response to receiving the data transmitted from the processor 308, may dispense the determined volume of underfill material 118 on the substrate 102 such that the space between the substrate 102 and the semiconductor chip 104 is substantially filled. In some embodiments, the underfill material 118 may be a composite material including an epoxy polymer and an amount of a filler material. The underfill dispensing device 312 may be any type of epoxy dispensing device, such as, but not limited to a needle or syringe epoxy dispensing device, and a jet spray epoxy dispensing device. The underfill material