110. In this manner, the sidewalls of the semiconductor substrate 110 remaining under the BSM structures 145 may be maintained substantially perpendicular to the back side 112 of the semiconductor substrate 110. In some embodiments, the plasma etch process includes fluorine (F)—e.g., fluorine-based plasma etch process generating the flux 155 including F atoms.

As a result of alternating the etch steps and deposition steps, the sidewall profiles of the semiconductor substrate 110 may be uneven (not shown in FIG. 1H) as described in more detail with reference to FIG. 3B. In some embodiments, the uneven side wall profiles include a plurality of raised lines substantially parallel to the back side 112 of the semiconductor substrate 110. In some embodiments, the uneven sidewall profiles include ribbed surfaces, undulating surfaces, surfaces with ridges, surfaces with crests and troughs, or a combination thereof.

FIG. 1I shows that a fourth adhesive tape 160 (attached to a frame ring 161) is attached to the BSM structures 145 after completing the plasma etch process step described above with reference to FIG. 1H. FIG. 1I also depicts cutting of the third adhesive tape 150 (as indicated with two triangles) to remove the frame ring 151. FIG. 1J shows that the remaining portion of the third adhesive tape 150 is removed (e.g., peeled) from the dielectric layer 125. After removing the third adhesive tape 150, the dielectric layer 125 that has been exposed from the back side 112 is the only structure that connects individual semiconductor dies 110 to each other.

FIG. 1K shows that the exposed portion of the dielectric layer 125 can be severed (broken) by pulling the fourth adhesive tape 160 as indicated by two lateral arrows directed to opposite directions. Physically separating (breaking) the exposed portion of the dielectric layer 125 may be independent of whether the dielectric layer 125 corresponding to the scribe lines 120 includes any scribe line structures or whether the scribe line structures (if any) include a metal layer or not. Accordingly, the present disclosure can provide for separating individual semiconductor dies 115 regardless of any metal layers or structures present in the scribe lines 120.

As a result of severing (breaking) the exposed portion of the dielectric layer 125, the dielectric layer 125 may include one or more portions 126 extended beyond edges of the semiconductor substrate 110 of individual semiconductor dies 115. The portions 126 may be regarded as free-standing beyond the edge of the semiconductor substrate 110, or hanging over a space unsupported by the semiconductor substrate 110. In some cases, the portions 126 may be referred to as burrs of the dielectric layer 125.

In some embodiments, the semiconductor dies 115 including the burrs 126 as depicted in FIG. 1K may be considered ready for the rest of assembly process steps—e.g., being picked up from the adhesive tape 160 to be mounted on a lead frame, forming wire bonds, forming a mold structure to protect the semiconductor dies 115, and so on. For example, if the width of the scribe lines 120 is approximately 10 microns or less, the burrs 126 may remain with the semiconductor dies 115—e.g., the ultrasonic water jet process described with reference to FIG. 1L may be omitted. Moreover, the scribe lines that are approximately 10 microns wide (or less) may not include any scribe line structures (with or without a metal layer).

FIG. 1L shows that the burrs 126 of the dielectric layer 125 (or remnants of expansion debris) can be removed. Also, FIG. 4 shows a 3D schematic diagram of the semiconductor dies 115 after the burrs 126 are removed. For example, an ultrasonic water jet process 165 can be utilized to remove the burrs 126 of the dielectric layer 125. In some embodiments, the ultrasonic water jet process 165 includes applying ultrasonic oscillation and pressure to a stream of water. In some embodiments, the ultrasonic oscillation may range approximately between 500 to 3,000 hertz (Hz). In some embodiments, the pressure may range approximately between 10 to 40 pounds per square inch (psi). The semiconductor dies 115 depicted in FIG. 1L are ready for the rest of assembly process steps—e.g., being picked up from the adhesive tape 160 to be mounted on a lead frame, forming wire bonds, forming a mold structure to protect the semiconductor dies 115, and so on.

As described herein, separating the semiconductor dies 115 from the semiconductor substrate 110 in accordance with embodiments of the present disclosure eliminates mechanical sawing (dicing) of the semiconductor substrate 110. Accordingly, the final thickness of the semiconductor substrate 110 can be reduced to be less (thinner) than typical thicknesses required by mechanical dicing techniques (e.g., 4 mils or so to endure the mechanical stress). For example, the final thickness of the semiconductor substrate 110 (e.g., T2 described with reference to FIG. 1B) may be 3 mils, 2 mils, 1 mil, or even less.

Moreover, the thinner final thickness of the semiconductor substrate 110 is expected to provide additional advantages. For example, the thinner final thickness tends to reduce the aspect ratio for the plasma etch process described with reference to FIG. 1H—e.g., when the width of the scribe lines 120 is fixed. The reduced aspect ratio may facilitate maintaining the sidewall profile to be substantially perpendicular to the back side of the semiconductor substrate 110. Additionally, the thinner final thickness may facilitate reducing the scribe line width, decreasing the throughput time for the plasma etch process, reducing resistance between source and drain of power FETs, or the like.

FIG. 2 is a three-dimensional (3D) schematic diagram of a sacrificial structure (e.g., the sacrificial structure 140) formed on a semiconductor substrate (e.g., the semiconductor substrate 110) in accordance with embodiments of the present disclosure. As described above with reference to FIG. 1E, the sacrificial structure 140 covers the scribe lines 120 (a scribe region, a scribe area) of the semiconductor substrate 110. In some embodiments, the sacrificial structure 140 includes a photoresist. As described above with reference to FIG. 1F, the BSM structures can be formed on the back side 112 of the semiconductor substrate 110 uncovered by the sacrificial structure 140—i.e., the areas corresponding to the semiconductor dies 115.

FIGS. 3A and 3B are a plan view and a cross-sectional side view of a semiconductor substrate (e.g., the semiconductor substrate 110) in accordance with embodiments of the present disclosure.