The auxiliary pattern group 23 includes at least one line of auxiliary patterns 231. The line may be disposed at a side of the outer pattern group 22 away from the inner pattern group 21. In the example of FIG. 2, the auxiliary pattern group 23 includes four lines of auxiliary patterns 231 disposed respectively at four sides of the outer pattern group 22.

In the example of FIG. 2, for each of the sets of positioning detection patterns 221A, 221B, the pitch dimensions between any two adjacent patterns in the same line are identical. The set of positioning detection patterns 221A includes two lines, and each line includes a number of patterns. In this embodiment, for each of the sets 221A and 221B, the two lines of the positioning detection patterns of the set 221A or 221B include the same number of patterns. Each of the patterns may have an inner end facing the inner pattern group 21 and an outer end facing away from the inner pattern group 21; in one line of the set of positioning detection patterns 221A, the inner ends respectively of the patterns are aligned along a straight line (L1), and the outer ends respectively of the patterns are aligned along a straight line (L1′). Similarly, the set of positioning detection patterns 221B includes two lines, and each line includes a number of patterns. Each of the patterns may have an inner end and an outer end; in one line of the set of positioning detection patterns 221B, the inner ends respectively of the patterns are aligned along a straight line (L2), and the outer ends respectively of the patterns are aligned along a straight line (L2′). An angle defined by one of the lines L1, L1′ and one of the lines L2, L2′ is 90 degrees (i.e., a right angle). The patterns included in the set of positioning detection patterns 221A may have a density that is different from that of the patterns included in the set of positioning detection patterns 221B. Alternatively, the patterns included in the set of positioning detection patterns 221A and the patterns included in the set of positioning detection patterns 221B may have the same density.

It is noted that in some embodiments (as shown in FIG. 11), for each of the sets of positioning detection patterns 221A, 221B the outer ends respectively of the patterns may be not aligned along a straight line.

Two lines of auxiliary patterns 231 are arranged to extend along the direction X, and each of the auxiliary patterns 231 has an inner end facing the outer pattern group 22 and an outer end facing away from the outer pattern group 22. The inner ends of the auxiliary patterns 231 are not arranged on a straight line, nor are the outer ends of the auxiliary patterns 231, meaning that the auxiliary patterns 231 are not aligned along the direction X.

It is noted that while in the example of FIG. 2, each of the patterns included in the outer pattern group 22 may have the same dimensions, in other embodiments, each of the patterns included in the outer pattern group 22 may have different sizes. That is to say, in some embodiments, for the set of positioning detection patterns 221A, while the inner ends (or the outer ends) of the patterns are aligned along one straight line (L1 or L1′), the outer ends (or the inner ends) of the patterns may not necessarily be aligned along a straight line. Also, for the set of positioning detection patterns 221B, while the inner ends (or the outer ends) of the patterns are aligned along one straight line (L2 or L2′), the outer ends (or the inner ends) of the patterns may not necessarily be aligned along a straight line. Additionally, the patterns included in the set of positioning detection patterns 221A may have a density that is identical to that of the patterns included in the set of positioning detection patterns 221B.

For one of the lines of auxiliary patterns 231, it may be the case that the inner ends facing the outer pattern group 22 are aligned along a straight line, while the outer ends facing away from the outer pattern group 22 are arranged to not fall on a straight line. FIG. 3 is a fragmentary view of another detection pattern unit according to one embodiment of the disclosure, showing one such arrangement which makes a contour of the detection pattern unit 2 not a straight line, and therefore more recognizable.

In other embodiments, one, two or three lines of auxiliary patterns 231 may be present, and each of the lines may be arranged in a manner that is different from that shown in FIG. 2.

It is noted that, in different embodiments, the inner pattern group 21 and the outer pattern group 22 may be formed in one single patterning process, or formed in two different patterning processes, respectively.

It is noted that the auxiliary pattern group 23 is employed to increase a density evenness of the wirings formed using various processes (e.g., etching, photolithography, thin film, diffusion, chemical-mechanical planarization (CMP), etc.), so as to improve a loading effect and/or proximity effect related to the processes.

In some embodiments, the auxiliary pattern group 23 may be omitted.

FIG. 4 is a flow chart illustrating steps of a method for detecting a pattern on a semiconductor device according to one embodiment of the disclosure. In this embodiment, the method is implemented using the computer device that executes the pattern detecting system 300 as shown in FIG. 1.

In step 51, the data obtaining unit 31 obtains a detection pattern unit 2 and a to-be-detected pattern unit 4 that corresponds with the detection pattern unit 2.

In this embodiment, the detection pattern unit 2 may be one as shown in FIG. 2, and may be pre-stored in the storage medium of the computer device in the form of a GDS file, a GDSII file, an OASIS file, an MEBES file, a CAD file, an EDA file, etc., for generating a photomask.

In some embodiments, the detection pattern unit 2 may be a mask pattern that is generated based on a preset image dataset, and that is to be formed on a glass substrate using a patterning process.

In some embodiments, the detection pattern unit 2 may be a pattern that is generated based on the mask pattern, and that is to be formed on a semiconductor substrate (e.g., a silicon wafer) using a patterning process.

In this embodiment, the to-be-detected pattern unit 4 may be a mask pattern that is generated based on a preset image dataset (e.g., the detection pattern unit 2), and that is to be formed on a glass substrate using a patterning process.

In some embodiments, the to-be-detected pattern unit 4 may be a pattern that is generated based on the mask pattern, and that is formed on a semiconductor substrate (e.g., a silicon wafer) using a patterning process.

As such, the detection pattern unit 2 and the to-be-detected pattern unit 4 may be compared in a manner of wafer to wafer, mask to wafer, or mask to mask.

It is noted that the detection pattern unit 2 and the to-be-detected pattern unit 4 has the same circuit wiring patterns, and may be from a same or different sources (e.g., to be formed in separate processes or formed by different photomasks).

In the case that the detection pattern unit 2 and the to-be-detected pattern unit 4 are both to be formed on a semiconductor substrate using a patterning process, the detection pattern unit 2 and the to-be-detected pattern unit 4 may be formed using the same process (e.g., photolithography) with identical parameters (e.g., parameters associated with a photoresist or a photomask), or formed using the same process but with different parameters.

In some embodiments, the data obtaining unit 31 includes a scanning electron microscope (SEM) or a transmission electron microscope (TSM), and the detection pattern unit 2 and the to-be-detected pattern unit 4 may be top view images of patterns formed by a patterning process on a substrate, taken by the SEM or TEM. In some embodiments, a sectional view may be obtained (as shown in FIG. 5). In some embodiments, the data obtaining unit 31 includes a high resolution transmission electron microscope (HRTSM), and the atomic arrangement of the patterns can be seen on the images.

In this embodiment, the detection pattern unit 2 is a pattern that is generated based on the mask pattern, and that is to be formed on a semiconductor substrate using a patterning process. The to-be-detected pattern unit 4 has the same circuit wiring pattern as the detection pattern unit 2, and is formed on the semiconductor substrate using a single patterning process. It is noted that in some embodiments, the to-be-detected pattern unit 4 may be formed on the semiconductor substrate using more than one patterning processes. For example, it may be the case that the inner pattern group 41 is formed in one patterning process while the outer pattern group 42 is formed in another patterning process. In step 51, the data obtaining unit 31 obtains the to-be-detected pattern unit 4 on the selected area of the semiconductor substrate (not depicted in the drawings) after the patterning process, and then accesses the storage medium to obtain the detection pattern unit 2 having the same circuit wiring pattern as the to-be-detected pattern unit 4.

In some embodiments, the obtaining of the detection pattern unit 2 includes accessing an image file that is pre-stored in a storage medium of the computer device in the form of a GDS file, a GDSII file, an OASIS file, an MEBES file, a CAD file or an EDA file, and that is for generating a photomask, wherein the image file serves as the detection patter unit 2. Alternatively, the obtaining of the detection pattern unit 2 may include obtaining images of a pattern formed on a substrate using a photomask generated using the image file, wherein the images serve as the detection pattern unit 2. The image file may include an originally designed pattern that is intended to be formed as a photomask.

In some embodiments, the operations of step 51 includes obtaining images of a pattern formed on a substrate using a photomask generated using the image file, wherein the images serve as the to-be-detected pattern unit 4, and obtaining a part of the image file that corresponds with the to-be-detected pattern unit 4, wherein the part serves as the detection pattern unit 2. It is noted that the obtaining

In some embodiments, the obtaining of the detection pattern unit 2 and the to-be-detected pattern unit 4 includes obtaining top view images or sectional view images of patterns formed by a patterning process on a substrate, wherein the top view images or sectional view images serve as the detection pattern unit 2 and the to-be-detected pattern unit 4. The patterns may be formed using a photomask generated based on the above image file.

In some embodiments, the detection pattern unit 2 is an image of a pattern formed on a substrate, and the semiconductor device pattern 4 is an image of a pattern formed on the same substrate or a separate substrate.

FIG. 6 is a top view of an exemplary to-be-detected pattern unit 4 according to one embodiment of the disclosure. In this embodiment, the to-be-detected pattern unit 4 includes an inner pattern group 41, an outer pattern group 42 and an auxiliary pattern group 43 that correspond to the inner pattern group 21, the outer pattern group 22 and the auxiliary pattern group 23 of the detection pattern unit 2, respectively.

The inner pattern group 41 includes at least one wiring pattern 411 corresponding respectively to the at least one detecting pattern 211. In the example of FIG. 6, the inner pattern group 41 includes a plurality of wiring patterns 411 spaced apart from one another. The wiring patterns 411 may have shapes and sizes of specific semiconductor patterns (e.g., isolated patterns, high density patterns, or low density patterns). In this embodiment, for each of the two sets of positioning patterns 421A, 421B, a pitch dimension between adjacent two of the positioning patterns in one of the two lines in the set is the same as a pitch dimension between adjacent two of the positioning patterns in the other one of the two lines in the set. In this embodiment, the pitch dimensions between two adjacent positioning patterns included in the two sets of positioning patterns 421A, 421B are the same.

The outer pattern group 42 is located to surround the inner pattern group 41, and includes two sets of positioning patterns 421A, 421B corresponding respectively to the two sets of positioning detection patterns 221A, 221B in the detection pattern unit 2. Each of the two sets of positioning patterns 421A, 421B includes two lines of patterns that are arranged along a direction. That is to say, four lines of patterns are present and arranged around the inner pattern group 41 to form a near-square shape.

In this embodiment, the set of positioning patterns 421A includes two lines of patterns that are arranged along and opposite to each other in the direction X, and the set of positioning patterns 421B includes two lines of patterns that are arranged along and opposite to each other in the direction Y. Each of the two sets of positioning patterns 421A, 421B may be a high density pattern, a low density pattern, a mirror symmetric pattern, a horizontally symmetric pattern, or a vertically symmetric pattern.

The auxiliary pattern group 43 includes at least one line of auxiliary patterns 431 corresponding respectively to the at least one line of auxiliary patterns 231 in the detection pattern unit 2. The line of auxiliary patterns 431 may be disposed near a corresponding one of the sides of the outer pattern group 42 away from the inner pattern group 42. In this embodiment, the auxiliary pattern group 43 includes two lines of auxiliary patterns 431 that are arranged to extend along the direction X, and two lines of auxiliary patterns 431 that are arranged to extend along the direction Y. Each of the auxiliary patterns 431 has an inner end facing the outer pattern group 42 and an outer end facing away from the outer pattern group 42. For each line of auxiliary patterns 431, the inner ends respectively of the auxiliary patterns 431 are not arranged on a straight line, and the outer ends respectively of the auxiliary patterns 431 are not arranged on a straight line, meaning that the auxiliary patterns 431 are not aligned along the corresponding one of the direction X and the direction Y.

Then, in step 52, with respect to the detection pattern unit 2, the positioning unit 32 generates, for each of two different directions, two connecting lines each extending along the direction and each interconnecting two of the positioning detection patterns respectively from the two lines of patterns of one of the sets of positioning detection patterns 221A, 221B (four connecting lines in total), and four intersections defined by the connecting lines. In the example of FIG. 2, four connecting lines (L11, L12 along the direction X, and L21, L22 along the direction Y), and four intersections (o) are generated.

Further, with respect to the to-be-detected pattern unit 4, the positioning unit 32 generates, for each of the two different directions, two connecting lines each extending along the direction and each interconnecting two of the positioning patterns respectively from the two lines of patterns of one of the sets of positioning patterns 421A, 421B (four connecting lines in total), and four intersections defined by the connecting lines. In the example of FIG. 6, four connecting lines (L11′, L12′ along the direction X, and L21′, L22′ along the direction Y), and four intersections (o′) are generated.

It is noted that in this embodiment, the connecting lines are generated to extend along the directions X and Y that are perpendicular to each other, in other embodiments, the connecting lines may be generated to extend along two directions that are not perpendicular to each other. Additionally, in some embodiments, additional connecting lines and intersections may be generated.

After the connecting lines and intersections are generated, the positioning unit 32 superimposes a first image on a second image where the first image has the to-be-detected pattern unit 4 and the connecting lines and the second image has the detection pattern unit 2 and the connecting lines, and adjusts the relative position between the first image and the second image such that the connecting lines on the first image coincide respectively with the connecting lines on the second image. Alternatively, the relative position between the first image and the second image is adjusted to make the intersections on the first image coincide respectively with the intersections on the second image. As such, see FIG. 7, a superimposed image unit 6 that includes a number of superimposed patterns 61 may be obtained. Each of the superimposed patterns 61 includes one pattern from the first image (the wiring pattern 411) and one corresponding pattern from the second image (the detecting pattern 211). FIG. 7 is a top view of an exemplary superimposed image unit 6 with the dotted lines indicating the detection pattern unit 2 and the solid lines indicating the to-be-detected pattern unit 4.

The generation of the superimposed image unit 6 may include adjusting one or both of the first image and the second image (scaling up, scaling down, shifting, etc.), such that the connecting lines from the first image overlap the corresponding connecting lines from the second image, and/or the intersections (o) coincide the intersections (o′), respectively. It is noted that by adjusting the first image and/or second image to make the intersections (o) coincide respectively with the intersections (o′), the superimposed image unit 6 may be generated without the potential errors occurred during the generation of the connecting lines L11, L12, L21, L22, L11′, L12′, L21′, and L22′, and may result in a more accurate alignment of the first image and the second image.

It is noted that in this embodiment, the two sets of positioning patterns 421A, 421B are disposed at an outside portion of the to-be-detected pattern unit 4, such that the resulting superimposed image unit 6 must cover the wiring patterns 411. However, the arrangement of the sets of positioning patterns 421A, 421B is not limited to such.

In step 53, for each of the superimposed patterns 61, the computing unit 33 calculates a difference between the wiring pattern 411 from the first image and the corresponding detecting pattern 211 from the second image (e.g., a displacement from the pattern to the corresponding pattern). In some embodiments, multiple differences between the wiring pattern 411 and the detecting pattern 211 in different aspects are calculated by the computing unit 33.

Then, in step 54, when the difference between the wiring pattern from the first image and the corresponding wiring pattern from the second image calculated by the computing unit 33 is larger than a threshold, the alert unit 34 generates and outputs an alert.

In this embodiment, the threshold may be a tolerance associated with the patterning process, a user-defined displacement, or other values. The alert may include an audio signal, an image, a text message, etc., and may be outputted to notify a user (e.g., an operator).

It is noted that in some embodiments, the operations of step 54 may be omitted.

FIG. 8 is a top view of part of an exemplary superimposed image unit 6, showing one superimposed pattern 61. In the conventional method, the wiring pattern 411 (shown by solid lines) and the detecting pattern 211 (shown by broken lines) included in the superimposed pattern 61 are compared, and the detection pattern unit 2 is adjusted to accommodate a difference detected in the comparison. It is noted that while the conventional method is able to detect a critical dimension (CD) error between the wiring pattern 411 and the detecting pattern 211, it may not be able to detect other differences at the same time (e.g., an edge placement error (EPE), which is a difference between edges of the wiring pattern 411 and the detecting pattern 211 in the superimposed pattern 61, or a displacement between the wiring pattern 411 and the detecting pattern 211 on an edge of the superimposed pattern 61). On the contrary, the method as described in the embodiments of the disclosure is capable of detecting the above-mentioned difference (EPE), and therefore provides a more accurate detecting method, enabling subsequent correction and allowing generation of new photomask to be more accurate. Additionally, using the method of this disclosure, an overlay error between the groups of a semiconductor device may be accurately determined as well.

In some embodiments, the to-be-detected pattern unit 4 and the detection pattern unit 2 may be embodied using various images. For example, two images of a specific pattern formed by different implementations of a specific process may serve as the to-be-detected pattern unit 4 and the detection pattern unit 2 for comparison. Two images of two photomasks or two silicon wafers each containing the specific pattern but provided by different providers may serve as the to-be-detected pattern unit 4 and the detection pattern unit 2 for comparison. Two images of two different substrates (a wafer, a photomask, etc.) each containing the specific pattern may serve as the to-be-detected pattern unit 4 and the detection pattern unit 2 for comparison. By using one of the images as the detection pattern unit 2 (i.e., a reference for comparison), the method may be implemented to determine a difference between the two images (i.e., a difference attributed to the hardware equipment, the providers, the substrates, etc.) for correction.

In some embodiments, the inner pattern group 21 and the outer pattern group 22 may be formed in different patterning processes, and the method can still be implemented.

FIG. 9 is a top view of a substrate 100 according to one embodiment of the disclosure. In this embodiment, the substrate 100 is made of a material different from the previous embodiments (i.e., a glass substrate) and is formed with a detection pattern unit 2 as described in the previous embodiments. The method may be implemented with respect to the detection pattern unit 2 and one of a plurality of detection pattern units 2′.

Each of the detection pattern units 2′ may include a wire pattern that is included in a photomask pattern formed on the substrate 100 and that has a shape that is the same as the detection pattern unit 2. As such, the method as described in the previous embodiments may be implemented with each of the detection pattern units 2′ serving as the to-be-detected pattern unit 4. It is noted that in some embodiments, each of the detection pattern units 2′ may be formed on a substrate that is separate from the substrate 100 (e.g., formed on different substrates from the detection pattern unit 2).

A pellicle 101 may be disposed on a part of the substrate 100 for protecting one or more detection pattern units 2′ and/or the detection pattern unit 2 from dusts. In this embodiment, the detection pattern unit 2 is under the pellicle 101, but in other embodiments, the pellicle 101 may be disposed such that the detection pattern unit 2 is not covered by the pellicle 101.

In the embodiment of FIG. 9, the detection pattern units 2′ and the detection pattern unit 2, each being formed on a different substrate (or a different portion of a single substrate), may be compared using the method as described in the previous embodiments. A result of the comparison may then be used to determine whether the pattern formed on the substrate is formed as desired.

In some embodiments, the detection pattern units 2′ are disposed outward of the detection pattern unit 2, and are not used for generating a photolithography pattern. That is to say, the detection pattern units 2′ are disposed outside of the pellicle 101, and after the patterning process is implemented, no photolithography pattern is formed on the substrate based on the detection pattern units 2′.

It is noted that the pattern detecting system 300 used for implementing the method of FIG. 4 may have the correction unit 35, the data conversion unit 36, and the photomask writing unit 37 omitted.

FIG. 10 is a flow chart illustrating steps of a method for detecting a pattern on a semiconductor device according to one embodiment of the disclosure. In this embodiment, the method is implemented using the computer device that executes the pattern detecting system 300 as shown in FIG. 1.

In the method of FIG. 10, steps 51 to 53 of the method of FIG. 4 are first implemented, so as to, for each of the superimposed patterns 61, calculate a difference between the wiring pattern 411 from the first image and the corresponding wiring pattern 211 from the second image. The details of steps 51 to 53 are not repeated herein for the sake of brevity.

Afterward, in step 55, in response to receipt of the calculation result from the computing unit 33, the correction unit 35 operates a GDS, an OASIS program, a MEBES program, a CAD program or an EDA program to perform a correction operation on the to-be-detected pattern unit 4 based on the calculation, so as to generate a calibrated image. In use, the correction unit 35 may perform the correction operation on a MEBES file that corresponds with the wiring pattern 411, with reference to the difference between the wiring pattern 411 from the first image and the corresponding detecting pattern 211 from the second image. It is noted that the operations of adjusting MEBES file are known in the related art, and details thereof are omitted herein for the sake of brevity.

Then, the data conversion unit 36 converts the calibrated image into a data file in a data stream format for data exchange.

Then, in step 56, the photomask writing unit 37 receives the data file and generates a calibrated photomask that corresponds with the calibrated image based on the data file.

In one example as shown in FIGS. 7 and 8, the detection pattern unit 2 may be a GDS file, and in use, the GDS file may be subjected to an OPC operation and then used to generate a photomask using a MEBES program. The to-be-detected pattern unit 4 is a lithography pattern formed on a semiconductor substrate via a patterning process using a photomask made from the GDS file to serve as the detection pattern unit 2.

In this example, the method includes first obtaining a superimposed image unit 6, and calculating, for one of the superimposed patterns 61, a difference between the wiring pattern 411 from the first image and the corresponding detecting pattern 211 from the second image. Then, in response to receipt of the calculation result from the computing unit 33, the correction unit 35 operates a MEBES program to perform a correction operation, so as to generate a calibrated image. Then, the data conversion unit 36 converts the calibrated image into a data file in a data stream format for data exchange.

Then, in step 56, the photomask writing unit 37 receives the data file and generates a calibrated photomask that corresponds with the calibrated image based on the data file.

It is noted that in some embodiments, the operations of step 54 (see FIG. 4) are also implemented between steps 53 and 55.

By implementing the above method, the data for generating a photomask may be corrected after being compared with the pattern that is actually formed using the photomask, such that the subsequently made photomasks may be made with more accuracy.

In some embodiments, after the operations of step 53, another step 57 may be implemented.