111G of the semiconductor element 101 via a via conductor 112G formed on the insulating substrate 120.

The plurality of lands 130 include a land 130S other than the lands 130E and 130G. The land 130S is a land serving as a signal terminal, a power terminal, a ground terminal, or a dummy terminal. In the first embodiment, each of the plurality of lands 130S is a fifth land, and each of the plurality of lands 230 is a sixth land. The land 130S and the land 230 are bonded to each other by solder bonding portion 193 that is a third solder bonding portion made of solder. A height of the solder bonding portion 193 is higher than a height of a capacitor 400 described later. Specifically, the height is 1.3 times or less the height of the capacitor. This is because warpage occurs from a center toward an outer peripheral edge of the semiconductor element 101 during a thermal bonding process.

The processing module 300 includes a capacitor 400 which is an example of a chip component. The capacitor 400 is a passive component and is a chip component. A size of the chip component in a plan view is preferably 0402 size or less, such as 0402 size of 0.4 mm×0.2 mm or 0201 size of 0.25 mm×0.125 mm. Notations such as 0402 size and 0201 size conform to the size notation method (mm standard) of electronic components in Japanese Industrial Standards.

The capacitor 400 includes an element body 401 having a substantially rectangular parallelepiped shape extending in a longitudinal direction as an example of a predetermined direction, and a pair of electrodes 410 and 420 provided on both sides of the element body 401 in the longitudinal direction. The pair of electrodes 410 and 420 is fixed to the element body 401 at intervals in the longitudinal direction. In FIGS. 2B and 3, the longitudinal direction of the capacitor 400, that is, the element body 401 is an X direction. A short direction of the capacitor 400, that is, the element body 401 is a Y direction. The Y direction is a width direction orthogonal to the X direction. A vertical direction of the capacitor 400, that is, the element body 401 is a Z direction. The Z direction is a direction orthogonal to the X direction and the Y direction. The Z direction is also a direction perpendicular to the main surfaces 121, 122, 221, and 222.

One electrode 410 of the pair of electrodes 410 and 420 is a first electrode, and the other electrode 420 is a second electrode. Each of the electrodes 410 and 420 includes a base and an outer film covering the base. A material of the outer film of the electrode 410,420 is a conductive metal material such as tin.

The capacitor 400 is a bypass capacitor. The electrode 410 of the capacitor 400 is electrically connected to the land 130E, and the electrode 420 of the capacitor 400 is electrically connected to the land 130G.

A power supply noise is generated by an inductance of a wire between the electrode 410 of the capacitor 400 and the power terminal 111E and an inductance of a wire between the electrode 420 of the capacitor 400 and the ground terminal 111G. The power supply noise refers to a voltage fluctuation of a power supply line caused by the operation of the semiconductor device 100. This voltage fluctuation occurs when a power supply current changes due to an inductance or a resistance parasitic in the power supply line. In order to reduce the power supply noise by reducing the inductance of the wire, the capacitor 400 is preferably disposed immediately below the semiconductor element 101 so that the wire between the capacitor 400 and the power terminal 111E and the wire between the capacitor 400 and the ground terminal 111G of the semiconductor device 100 are minimized. That is, it is preferable that the semiconductor element 101 and the capacitor 400 overlap in a plan view of the processing module 300 from the semiconductor device 100 side.

Therefore, in the first embodiment, the capacitor 400 is disposed on the main surface 221 side of the insulating substrate 220 of the printed wiring board 200, that is, between the semiconductor device 100 and the printed wiring board 200. The electrode 410 of the capacitor 400 is bonded to the land 130E by a solder bonding portion 191 which is a first solder bonding portion formed of solder. The electrode 420 of capacitor 400 is bonded to the land 130G by a solder bonding portion 192 which is a second solder bonding portion made of solder. Accordingly, the electrode 410 of the capacitor 400 is electrically connected directly to the land 130E of the semiconductor device 100 by the solder bonding portion 191 without the printed wiring board 200 interposed therebetween. Therefore, the inductance of the wire between the electrode 410 of the capacitor 400 and the land 130E can be reduced. Further, the electrode 420 of the capacitor 400 is electrically connected to the land 130G of the semiconductor device 100 directly by the solder bonding portion 192 without the printed wiring board 200 interposed therebetween. Therefore, the inductance of the wire between the electrode 420 of the capacitor 400 and the land 130G can be reduced. Since the inductance of the wire is reduced, the generated power supply noise is reduced, and a speed of communication in the semiconductor device 100 can be increased.

In the first embodiment, the solder bonding portions 191 and 192 are in contact with the solder resist 208, but are not in contact with the land 230 of the printed wiring board 200.

FIG. 4A is an exploded partial perspective view of the processing module 300 according to the first embodiment. FIG. 4B is a schematic diagram for explaining an arrangement relationship of the semiconductor device 100, capacitor 400, and printed wiring board 200 when viewed in the Z direction. In FIGS. 4A and 4B, illustrations of solder bonding portions 191 and 192 are omitted. In FIG. 4B, the lands 130E and 130G of the semiconductor device are indicated by broken lines.

As illustrated in FIG. 4A, the electrode 410 has three side surfaces 411, 412, and 413, an upper surface 414, and a lower surface 415, which are electrode surfaces. The side surfaces 411, 412, and 413, the upper surface 414, and the lower surface 415 have rectangular shapes when viewed from a direction perpendicular to each surface. Among the three side surfaces 411, 412, and 413, the two side surfaces 412 and 413 face each other at an interval in the Y direction. The upper surface 414 and the lower surface 415 face each other at an interval in the Z direction. The side surface 411 is orthogonal to and adjacent to the side surfaces 412 and 413, the upper surface 414, and the lower surface 415. The electrode 420 has three side surfaces 421, 422, and 423, an upper surface 424, and a lower surface 425 which are electrode surfaces. The side surfaces 421, 422, and 423, the upper surface 424, and the lower surface 425 have rectangular shapes when viewed from a direction perpendicular to each surface. Among the three side surfaces 421, 422, and 423, the two side surfaces 422 and 423 face each other at an interval in the Y direction. The upper surface 424 and the lower surface 425 face each other at an interval in the Z direction. The side surface 421 is orthogonal to and adjacent to the side surfaces 422 and 423, the upper surface 424, and the lower surface 425. The side surface 411 of the electrode 410 and the side surface 421 of the electrode 420 are arranged to face each other at an interval in the X direction. The upper surface 414 of the electrode 410 faces the land 130E of the semiconductor device 100, and the lower surface 415 of the electrode 410 faces the solder resist 208 of the printed wiring board 200. The upper surface 424 of the electrode 420 faces the land 130G of the semiconductor device 100, and the lower surface 425 of the electrode 420 faces the solder resist 208 of the printed wiring board 200.

As illustrated in FIG. 4B, the land 130E and the land 130G are arranged at intervals in the X direction. The land 130E overlaps at least a portion of the electrode 410 of the capacitor 400, the entire electrodes 410 in the first embodiment in a plan view, that is, when viewed in the Z direction. The land 130G overlaps at least a portion of the electrode 420 of the capacitor 400, the entire electrode 420 in the first embodiment when viewed in the Z direction. In the first embodiment, an area S_130Eof the land 130E is larger than an area S₄₁₀of the electrode 410 as viewed in the Z direction. When viewed in the Z direction, an area S_130Gof the land 130G is larger than an area S₄₂₀of the electrode 420. The land 130E and the land 130G extend outward in the X direction from the capacitor 400 when viewed in the Z direction.

As illustrated in FIG. 3, each of the solder bonding portions 191 and 192 has a fillet shape in which the outer surface spreads away from the capacitor 400 from the solder resist 208 toward each of the lands 130E and 130G. More specifically, the solder bonding portion 191 has a fillet shape in which the solder bonding portion 191 expands outward in the X direction from the electrode 410, that is, in the X1 direction, as the solder bonding portion 191 extends from the solder resist 208 toward the land 130E. The solder bonding portion 192 has a fillet shape in which the solder bonding portion 192 expands outward in the X direction from the electrode 420, that is, in the X2 direction, as the solder bonding portion 192 extends from the solder resist 208 toward the land 130G. The X1 direction is a direction away from the electrode 410 in the X direction. The X2 direction is a direction opposite to the X1 direction in the X direction and is a direction away from the electrode 420. As a result, the bonding strength between each of the lands 130E and 130G and each of the electrodes 410 and 420 increases. Further, as illustrated in FIG. 2B, each of the solder bonding portions 191 and 192 is prevented from having a shape bulging in the X direction, and each of the solder bonding portions 191 and 192 is prevented from being short-circuited with the adjacent solder bonding portion 193.

As illustrated in FIG. 4B, each of the lands 130E and 130G has a rectangular shape when viewed in the Z direction, but is not limited thereto. For example, the lands 130E and 130G may have any shape such as a polygonal shape, a circular shape, or an elliptical shape when viewed in the Z direction.

Next, a method of manufacturing the processing module 300 will be described. FIGS. 5A to 5F are explanatory diagrams of the method of manufacturing the processing module 300 according to the first embodiment. As illustrated in FIG. 5A, the printed wiring board 200 is prepared (Step S1). In Step S1, the semiconductor device 100 and the capacitor 400 are also prepared. Next, as illustrated in FIG. 5B, a solder paste P1 as a first solder paste, a solder paste P2 as a second solder paste, and a solder paste P3 as a third solder paste are supplied onto the printed wiring board 200 at intervals (Step S2). In the first embodiment, in Step S2, the solder paste P1 and the solder paste P2 are supplied onto the solder resist 208. In Step S2, the solder paste P3 is supplied onto the land 230 of the printed wiring board 200.

The solder pastes P1, P2, and P3 contain solder powder. The solder pastes P1, P2, and P3 may further contain a flux component necessary for soldering. In the present embodiment, the solder pastes P1, P2, and P3 are all the same material, but are not limited to the same material as long as the solder pastes P1, P2, and P3 have close melting point. In Step S2, the solder pastes P1, P2, and P3 are supplied to the printed wiring board 200 by screen printing using the metal mask 23. The method for supplying the solder pastes P1, P2, and P3 is not limited thereto. For example, the solder pastes P1, P2, and P3 may be supplied to the printed wiring board 200 by a dispenser.

Next, as illustrated in FIG. 5C, the capacitor 400 prepared in Step S1 is placed on the printed wiring board 200 such that the electrode 410 is in contact with the solder paste P1 and the electrode 420 is in contact with the solder paste P2 (Step S3). As a result, the lower surface 415 of the electrode 410 comes into contact with the solder paste P1, and the lower surface 425 of the electrode 420 comes into contact with the solder paste P2. It is not necessary to attach solder balls to the electrodes 410 and 420 of the capacitor 400 in advance. In Step S3, the capacitor 400 is mounted on the printed wiring board 200 using a mounter (not illustrated). At this time, the capacitor 400 is positioned and placed on the printed wiring board such that the electrode 410 and the solder paste P1 face each other and the electrode 420 and the solder paste P2 face each other.

Next, as illustrated in FIG. 5D, the semiconductor device 100 prepared in Step S1 is mounted on the printed wiring board 200 such that the land 130E faces the electrode 410 and the land 130G faces the electrode 420 (Step S4). In Step S4, the semiconductor device 100 is mounted on the printed wiring board 200 using a mounter (not illustrated). At this time, the semiconductor device 100 is aligned and placed on the printed wiring board such that the land 130E faces the electrode 410, the land 130G faces the electrode 420, and the land 130S faces the land 230. Here, the solder balls are not provided on the lands 130E and 130G of the semiconductor device 100 prepared in Step S1, and solder balls B as ball terminals are provided on the lands 130S. Therefore, the semiconductor device 100 is placed on the printed wiring board 200 such that the center of the solder ball B coincides with the center of the land 230. In Step S4, the semiconductor device 100 is placed on the printed wiring board 200 to bring the solder balls B formed on the lands 130S into contact with the solder paste P3. In FIG. 5D, the upper surface 414 of the electrode 410 and the land 130E are not in contact with each other, and the upper surface 424 of the electrode 420 and the land 130G are not in contact with each other, but these may be contacted with others.

In Step S4, a positional relationship among the printed wiring board 200, the capacitor 400, and the semiconductor device 100 when viewed from the Z direction is as illustrated in FIG. 4B. When the capacitor 400 is placed on the printed wiring board 200, each of the land 130E and the land 130G of the semiconductor device 100 overlaps at least a portion of each of the electrode 410 and the electrode 420 when viewed in the Z direction, and extends outward in the X direction from the capacitor 400.

Next, in a state where the semiconductor device 100 and the capacitor 400 are placed on the printed wiring board 200, the printed wiring board 200 is conveyed to a reflow furnace (not illustrated). Then, in Step S5-1 illustrated in FIG. 5E, a temperature of the atmosphere in the reflow furnace is adjusted to a temperature equal to or higher than the melting point of the solder, and the solder pastes P1, P2, and P3 and the solder ball B of FIG. 5D are melted as illustrated in FIG. 5E. The solder paste P1 is melted to form a flowable molten solder M1, and the solder paste P2 is melted to form a flowable molten solder M2. When the solder paste P3 and the solder ball B are melted, a flowable molten solder M3 is obtained.

Subsequent to Step S5-1, in Step S5-2 illustrated in FIG. 5F, heating is continued to cause the molten solders M1 and M2 to flow. Since the electrode 410,420 has better wettability of the molten solder than the solder resist 208, the molten solders M1 and M2 crawl up the side surfaces 411 and 421 in an upward direction indicated by an arrow Z1 as illustrated in FIG. 5E. Thereafter, the molten solders M1 and M2 move to the upper surfaces 414 and 424 as illustrated in FIG. 5F due to the wet-spreading property. Although not illustrated in FIG. 5E, the molten solders M1 and M2 also crawl up in the upward direction indicated by the arrow Z1 on the side surfaces 412 and 413 of the electrode 410 and the side surfaces 422 and 423 of the electrode 420.

In addition, the capacitor 400 is pushed upward toward the semiconductor device 100 by the molten solders M1 and M2, the distance between the upper surface 414 of the electrode 410 and the land 130E is narrowed, and the distance between the upper surface 424 of the electrode 420 and the land 130G is narrowed. The molten solders M1 and M2 reaching the upper surfaces 414 and 424 come into contact with the lands 130E and 130G, wet-spread on the lands 130E and 130G, and have a fillet shape in which the skirt widens as it goes from the solder resist 208 toward the lands 130E and 130G.

Thereafter, the molten solders M1 and M2 wet-spread to every corner of the lands 130E and 130G are cooled and solidified. As a result, the molten solder M1 is cooled and solidified in a fillet shape on the land 130E. The molten solder M2 is cooled and solidified in a fillet shape on the land 130G. At the same time, the molten solder M3 is also cooled and solidified. As a result, as illustrated in FIG. 3, the solder bonding portion 191 in which the land 130E and the electrode 410 are bonded by solder is formed, and the solder bonding portion 192 in which the land 130G and the electrode 420 are bonded by solder is formed. In addition, the solder bonding portion 193 in which the land 130S and the land 230 are bonded by solder is formed. As described above, the processing module 300 illustrated in FIG. 3 is manufactured.

Thereafter, the processing module 300 illustrated in FIG. 3 is housed in the casing 611 illustrated in FIG. 1, whereby the camera body 601, that is, the digital camera 600 is manufactured.

As described above, by melting the solder pastes P1 and P2 supplied to the printed wiring board 200, the solder can be supplied to the lands 130E and 130G of the semiconductor device 100 via the electrodes 410 and 420 of the capacitor 400. As a result, it is not necessary to form solder balls on the electrodes 410 and 420 of the capacitor 400 in advance, and the process of manufacturing the processing module 300 can be reduced. Therefore, since the processing module 300 can be easily manufactured, productivity of the processing module 300 is improved.

Here, when the solder wettability in the lands 130E and 130G of the semiconductor device 100 is F1, and the solder wettability in the electrodes 410 and 420 of the capacitor 400 is F2, a relationship of F1≥F2 is preferably satisfied. For example, by using gold as the material of the surface of the land 130, that is, the material of the surfaces of the lands 130E and 130G, the relationship of F1≥F2 is established, and the molten solders M1 and M2 easily wet-spread in the lands 130E and 130G. As a result, the solder bonding portions 191 and 192 tends to have a fillet shape on the lands 130E and 130G. Therefore, even when the amount of solder in the solder bonding portions 191 and 192 is reduced, the lands 130E and 130G of the semiconductor device 100 and the electrodes 410 and 420 of the capacitor 400 can be reliably connected. Accordingly, even when the lands 130 of the semiconductor device 100 are arranged at a high density, it is possible to prevent a bonding failure from occurring.

Second Embodiment

A second embodiment will be described. FIG. 6 is a schematic cross-sectional view in which a portion of a processing module according to the second embodiment is enlarged. FIG. 6 schematically illustrates a cross section of a processing module 300A according to the second embodiment. In the following description, the same components as those of the first embodiment are denoted by the same reference numerals, and detailed description thereof will be omitted.

The processing module 300A according to the second embodiment includes the semiconductor device 100 having the same configuration as that of the first embodiment and a printed wiring board 200A. Similarly to the first embodiment, the land 130E that is the first land, the land 130G that is the second land, and the land 130S that is the fifth land are arranged on the main surface 122 of the insulating substrate 120 included in the semiconductor device 100.

The printed wiring board 200A includes the insulating substrate 220 similar to that of the first embodiment. The insulating substrate 220 has a main surface 221 and a main surface 222 opposite to the main surface 221. The printed wiring board 200A includes a land 230E that is a third land, a land 230G that is a fourth land, and a land 230S that is a sixth land, which are disposed on the main surface 221 of the insulating substrate 220.

The lands 230E, 230G, and 230S are terminals formed of a conductive metal material such as copper or gold. The land 230E is a power terminal, and the land 230G is a ground terminal. The land 230S is a signal terminal, a power terminal, a ground terminal, or a dummy terminal. A via conductor 212E formed on the insulating substrate 220 is connected to the land 230E. The via conductor 212G formed on the insulating substrate 220 is connected to the land 230G.

The printed wiring board 200A includes the solder resist 208A. The solder resist 208A is a film made of a solder resist material. The solder resist 208A is provided on the main surface 221. The land 230S is exposed through an opening portion formed in the solder resist 208A. The land 230E and the land 230G are exposed by one opening portion HA formed in the solder resist 208A. Note that each of the land 230E and the land 230G may be exposed by each of two opening portions formed independently.

The land 130E and land 230E are bonded to each other by a solder bonding portion 191A that is a first solder bonding portion made of solder. The land 130G and land 230G are bonded by a solder bonding portion 192A that is a second solder bonding portion made of solder. The land 130S and land 230S are bonded to each other by a solder bonding portion 193A that is a third solder bonding portion made of solder.

The processing module 300A includes a capacitor 400 used as a bypass capacitor as in the first embodiment. The capacitor 400 is disposed on the main surface 221 side of the insulating substrate 220 of the printed wiring board 200A, that is, between the semiconductor device 100 and the printed wiring board 200A. The electrode 410 of the capacitor 400 is bonded to the land 130E by the solder bonding portion 191A. The electrode 420 of the capacitor 400 is bonded to the land 130G by the solder bonding portion 192A. Thus, the electrode 410 of the capacitor 400 is electrically connected directly to the land 130E of the semiconductor device 100 by the solder bonding portion 191A. Therefore, the inductance of the wire between the electrode 410 of the capacitor 400 and the land 130E can be reduced. Further, the electrode 420 of the capacitor 400 is electrically connected directly to the land 130G of the semiconductor device 100 by the solder bonding portion 192A. Therefore, the inductance of the wire between the electrode 420 of the capacitor 400 and the land 130G can be reduced. Since the inductance of the wire is reduced, the generated power supply noise is reduced, and a speed of communication in the semiconductor device 100 can be increased.

In the second embodiment, the land 230E is electrically connected to the land 130E by the solder bonding portion 191A. The land 230G is electrically connected to the land 130E by the solder bonding portion 192A. A power supply IC (not illustrated) electrically connected to the via conductors 212E and 212G illustrated in FIG. 6 is mounted on the printed wiring board 200A. The power supply IC can supply power to the semiconductor element 101 of the semiconductor device 100 via the solder bonding portion 191A and the solder bonding portion 192A.

FIG. 7A is an exploded partial perspective view of the processing module 300A according to the second embodiment. FIG. 7B is a schematic diagram for explaining an arrangement relationship of the semiconductor device 100, the capacitor 400, and the printed wiring board 200A when viewed in the Z direction. In FIGS. 7A and 7B, illustrations of solder bonding portions 191A and 192A are omitted. In FIG. 7B, the lands 130E and 130G of the semiconductor device are indicated by broken lines.

As illustrated in FIG. 7A, the upper surface 414 of the electrode 410 faces the land 130E of the semiconductor device 100, and the lower surface 415 of the electrode 410 faces the land 230E of the printed wiring board 200A. The upper surface 424 of the electrode 420 faces the land 130G of the semiconductor device 100, and the lower surface 425 of the electrode 420 faces the land 230G of the printed wiring board 200A.

As illustrated in FIG. 7B, the land 130E and the land 130G are arranged at intervals in the X direction. The land 130E overlaps at least a portion of the electrode 410 of the capacitor 400, the entire electrode 410 in the second embodiment when viewed in the Z direction. The land 130G overlaps at least a portion of the electrode 420 of the capacitor 400, the entire electrode 420 in the second embodiment when viewed in the Z direction. The land 230E and the land 230G are arranged at intervals in the X direction. The land 230E overlaps at least a portion of the electrode 410 of the capacitor 400, the entire electrode 410 in the second embodiment when viewed in the Z direction. The land 230G overlaps at least a portion of the electrode 420 of the capacitor 400, the entire electrode 420 in the second embodiment when viewed in the Z direction. In addition, the land 130E overlaps at least a portion of the land 230E, the entire land 230E in the second embodiment when viewed in the Z direction. In addition, the land 130G overlaps at least a portion of the land 230G, the entire land 230G in the second embodiment as viewed in the Z direction. In the second embodiment, the area S_130Eof the land 130E is larger than the area S₄₁₀of the electrode 410 as viewed in the Z direction. When viewed in the Z direction, an area S_130Gof the land 130G is larger than an area S₄₂₀of the electrode 420. The land 130E and the land 130G extend outward in the X direction from the capacitor 400 when viewed in the Z direction.

In the second embodiment, as illustrated in FIG. 7B, the area S_130Eof the land 130E is larger than the area S_230Eof the land 230E when viewed in the Z direction. When viewed in the Z direction, the area S_130Gof the land 130G is larger than the area S_230Gof the land 230G. Further, when viewed in the Z direction, an area S_HAof the opening portion HA is larger than an area S₄₀₀of the capacitor 400.

As illustrated in FIG. 6, each of the solder bonding portions 191A and 192A has a fillet shape in which the outer surface expands away from the capacitor 400 as each of the solder bonding portions 191A and 192A extends from each of the lands 230E and 230G toward each of the lands 130E and 130G. More specifically, the solder bonding portion 191A has a fillet shape that expands outward in the X direction from the electrode 410, that is, in the X1 direction, as the solder bonding portion 191A extends from the land 230E toward the land 130E. The solder bonding portion 192A has a fillet shape that expands outward in the X direction from the electrode 410, that is, in the X2 direction, as the solder bonding portion 192A extends from the land 230G toward the land 130G. The X1 direction is a direction away from the electrode 410 in the X direction. The X2 direction is a direction opposite to the X1 direction in the X direction and is a direction away from the electrode 420. As a result, the bonding strength between each of the lands 130E and 130G and each of the electrodes 410 and 420 increases. Further, each of the solder bonding portions 191A and 192A is prevented from having a shape bulging in the X direction, and each of the solder bonding portions 191A and 192A is prevented from being short-circuited with the adjacent solder bonding portion 193A.

As illustrated in FIG. 7B, each of the lands 230E and 230G has a rectangular shape when viewed in the Z direction, but is not limited thereto. For example, the lands 230E and 230G may have any shape such as a polygonal shape, a circular shape, or an elliptical shape when viewed in the Z direction.

Next, a method of manufacturing the processing module 300A will be described. FIGS. 8A to 8F are explanatory diagrams of a method of manufacturing the processing module 300A according to the second embodiment. As illustrated in FIG. 8A, the printed wiring board 200A is prepared (Step S11). In Step S11, the semiconductor device 100 and the capacitor 400 are also prepared. Next, as illustrated in FIG. 8B, the solder paste P1 which is the first solder paste, the solder paste P2 which is the second solder paste, and the solder paste P3 which is the third solder paste are supplied onto the printed wiring board 200A at intervals (Step S12). In the second embodiment, in Step S12, the solder paste P1 is supplied onto the land 230E exposed by the opening portion HA formed in the solder resist 208A. In addition, the solder paste P2 is supplied onto the land 230G exposed through the opening portion HA formed in the solder resist 208A. In Step S12, the solder paste P3 is supplied onto the land 230S of the printed wiring board 200A.

In Step S12, the solder pastes P1, P2, and P3 are supplied to the printed wiring board 200A by screen printing using the metal mask 23. The method for supplying the solder pastes P1, P2, and P3 is not limited thereto. For example, the solder pastes P1, P2, and P3 may be supplied to the printed wiring board 200A by a dispenser.

Next, as illustrated in FIG. 8C, the capacitor 400 prepared in Step S11 is placed on the printed wiring board 200A such that electrode 410 is in contact with the solder paste P1 and the electrode 420 is in contact with solder paste P2 (Step S13). As a result, the lower surface 415 of the electrode 410 comes into contact with the solder paste P1, and the lower surface 425 of the electrode 420 comes into contact with the solder paste P2. It is not necessary to attach solder balls to the electrodes 410 and 420 of the capacitor 400 in advance.

Next, as illustrated in FIG. 8D, the semiconductor device 100 prepared in Step S11 is mounted on the printed wiring board 200A such that the land 130E faces the electrode 410 and the land 130G faces the electrode 420 (Step S14). In Step S14, the semiconductor device 100 is placed on the printed wiring board 200A to bring the solder balls B, which are ball terminals provided on the lands 130S, into contact with the solder paste P3. In FIG. 8D, the upper surface 414 of the electrode 410 and the land 130E, and the upper surface 424 of the electrode 420 and land 130G are not in contact with each other, but these may be contacted with other.

In Step S14, the positional relationship among the printed wiring board 200A, the capacitor 400, and the semiconductor device 100 when viewed from the Z direction is as illustrated in FIG. 7B. When the capacitor 400 is placed on the printed wiring board 200A, each of the land 130E and the land 130G of the semiconductor device 100 overlaps at least a portion of each of the electrode 410 and the electrode 420 when viewed in the Z direction, and extends outward in the X direction from the capacitor 400.

Next, in a state where the semiconductor device 100 and the capacitor 400 are placed on the printed wiring board 200A, the printed wiring board 200A is conveyed to a reflow furnace (not illustrated). Then, in Step S15-1 illustrated in FIG. 8E, the temperature of the atmosphere in the reflow furnace is adjusted to a temperature equal to or higher than the melting point of the solder, and the solder pastes P1, P2, and P3 and the solder ball B of FIG. 8D are melted as illustrated in FIG. 8E. The solder paste P1 is melted to form a flowable molten solder M1, and the solder paste P2 is melted to form a flowable molten solder M2. When the solder paste P3 and the solder ball B are melted, a flowable molten solder M3 is obtained.

Subsequent to Step S15-1, in Step S15-2 illustrated in FIG. 8F, heating is continued to cause the molten solders M1 and M2 to flow. As illustrated in FIG. 8E, the molten solders M1 and M2 crawl up the side surfaces 411 and 421 in the upward direction indicated by the arrow Z1. Thereafter, the molten solders M1 and M2 move to the upper surfaces 414 and 424 as illustrated in FIG. 8F. Although not illustrated in FIG. 8E, the molten solders M1 and M2 also crawl up in the upward direction indicated by the arrow Z1 on the side surfaces 412 and 413 of the electrode 410 and the side surfaces 422 and 423 of the electrode 420.

In addition, the capacitor 400 is pushed upward toward the semiconductor device 100 by the molten solders M1 and M2, the distance between the upper surface 414 of the electrode 410 and the land 130E is narrowed, and the distance between the upper surface 424 of the electrode 420 and the land 130G is narrowed. The molten solders M1 and M2 reaching the upper surfaces 414 and 424 come into contact with the lands 130E and 130G, wet-spread on the lands 130E and 130G, and have a fillet shape in which the skirt widens as it goes from the solder resist 208A toward the lands 130E and 130G.

Thereafter, the molten solders M1 and M2 wet-spread to every corner of the lands 130E and 130G are cooled and solidified. As a result, the molten solder M1 is cooled and solidified in a fillet shape on the land 130E. The molten solder M2 is cooled and solidified in a fillet shape on the land 130G. At the same time, the molten solder M3 is also cooled and solidified. As a result, the solder bonding portions 191A, 192A, and 193A are formed as illustrated in FIG. 6. As described above, the processing module 300A illustrated in FIG. 6 is manufactured.

Thereafter, the processing module 300A illustrated in FIG. 6 is housed in the casing 611 illustrated in FIG. 1, thereby manufacturing a camera body of a digital camera which is an example of the electronic equipment.

As described above, by melting the solder pastes P1 and P2 supplied to the printed wiring board 200A, the solder can be supplied to the lands 130E and 130G of the semiconductor device 100 via the electrodes 410 and 420 of the capacitor 400. As a result, it is not necessary to form solder balls on the electrodes 410 and 420 of the capacitor 400 in advance, and the process of manufacturing the processing module 300A can be reduced. Therefore, since the processing module 300A can be easily manufactured, productivity of the processing module 300A is improved.

In addition, the land 130E and the land 230E are electrically connected by the solder bonding portion 191A, and the land 130G and the land 230G are electrically connected by the solder bonding portion 192A. As a result, the solder bonding portions 191A and 192A for bonding the capacitor 400 to the semiconductor device 100 can be used as power supply lines for supplying power to the semiconductor element 101 of the semiconductor device 100. This increases the degree of freedom of circuit design in the processing module 300A.

In the second embodiment, as illustrated in FIG. 7B, the areas S_130Eand S_130Gof the lands 130E and 130G are larger than the areas S_230Eand S_230Gof the lands 230E and 230G when viewed in the Z direction. Since the molten solders M1 and M2 are easily wet-spread in the lands 130E and 130G, it is possible to encourage more of the molten solders M1 and M2 to move to the lands 130E and 130G by utilizing this property. As a result, even if there is a variation in the supply amount of the solder pastes P1 and P2, the allowable amount for the variation in the solder pastes P1 and P2 increases as the areas of the lands 130E and 130G are wider. Therefore, it is possible to prevent generation of side balls and the like in the solder bonding portions 191A and 192A, and as a result, it is possible to prevent short circuit defects in the solder bonding portions 191A and 192A.

Third Embodiment

A third embodiment will be described. FIG. 9 is a schematic cross-sectional view in which a portion of the processing module according to the third embodiment is enlarged. FIG. 9 schematically illustrates a cross section of a processing module 300B according to the third embodiment. In the following description, the same components as those of the first embodiment are denoted by the same reference numerals, and detailed description thereof will be omitted.

The processing module 300B according to the third embodiment includes the semiconductor device 100 having the same configuration as that of the first embodiment and a printed wiring board 200B. Similarly to the first embodiment, the land 130E that is the first land, the land 130G that is the second land, and the land 130S that is the fifth land are arranged on the main surface 122 of the insulating substrate 120 included in the semiconductor device 100.

The printed wiring board 200B has the insulating substrate 220 similar to that of the first embodiment. The insulating substrate 220 has a main surface 221 and a main surface 222 opposite to the main surface 221. The land 230 is disposed on the main surface 221 of the insulating substrate 220 as in the first embodiment.

The printed wiring board 200B includes a solder resist 208B. The solder resist 208B is a film made of a solder resist material. The solder resist 208B is provided on the main surface 221. The land 230 is exposed through an opening portion formed in the solder resist 208B.

The processing module 300B includes the capacitor 400 used as a bypass capacitor as in the first embodiment. The capacitor 400 is disposed on the main surface 221 side of the insulating substrate 220 of the printed wiring board 200B, that is, between the semiconductor device 100 and the printed wiring board 200B. The electrode 410 of the capacitor 400 is bonded to the land 130E by a solder bonding portion 191B that is a first solder bonding portion formed of solder. The electrode 420 of the capacitor 400 is bonded to the land 130G by a solder bonding portion 192B that is a second solder bonding portion made of solder. Thus, the electrode 410 of the capacitor 400 is electrically connected directly to the land 130E of the semiconductor device 100 by the solder bonding portion 191B. Therefore, the inductance of the wire between the electrode 410 of the capacitor 400 and the land 130E can be reduced. The electrode 420 of the capacitor 400 is electrically connected directly to the land 130G of the semiconductor device 100 by the solder bonding portion 192B. Therefore, the inductance of the wire between the electrode 420 of the capacitor 400 and the land 130G can be reduced. Since the inductance of the wire is reduced, the generated power supply noise is reduced, and a speed of communication in the semiconductor device 100 can be increased.

The land 130S and land 230 are bonded to each other by a solder bonding portion 193B that is a third solder bonding portion made of solder. In the third embodiment, the solder resist 208B has an opening portion HB that exposes a portion 221B of the main surface 221.

FIG. 10A is an exploded partial perspective view of the processing module 300B according to the third embodiment. FIG. 10B is a schematic diagram for explaining an arrangement relationship of the semiconductor device 100, the capacitor 400, and the printed wiring board 200B when viewed in the Z direction. In FIGS. 10A and 10B, the solder bonding portions 191B and 192B are not illustrated. In FIG. 10B, the lands 130E and 130G of the semiconductor device are indicated by broken lines.

As illustrated in FIG. 10A, the upper surface 414 of the electrode 410 faces the land 130E of the semiconductor device 100, and the lower surface 415 of the electrode 410 faces the portion 221B of the main surface 221 of the printed wiring board 200B. The upper surface 424 of the electrode 420 faces the land 130G of the semiconductor device 100, and the lower surface 425 of the electrode 420 faces the portion 221B of the printed wiring board 200B.

As illustrated in FIG. 10B, the land 130E and the land 130G are arranged at intervals in the X direction. The land 130E overlaps at least a portion of the electrode 410 of the capacitor 400, the entire electrode 410 in the third embodiment in a plan view, that is, viewed in the Z direction. When viewed in the Z direction, the land 130G overlaps at least a portion of the electrode 420 of the capacitor 400, and the entire electrode 420 in the third embodiment. In the third embodiment, the area S_130Eof the land 130E is larger than the area S₄₁₀of the electrode 410 as viewed in the Z direction. When viewed in the Z direction, an area S_130Gof the land 130G is larger than an area S₄₂₀of the electrode 420. The land 130E and the land 130G extend outward in the X direction from the capacitor 400 when viewed in the Z direction.

As illustrated in FIG. 9, each of the solder bonding portions 191B and 192B has a fillet shape in which the outer surface expands away from the capacitor 400 as each of the solder bonding portions 191B and 192B extends from the portion 221B exposed by the opening portion HB toward each of the lands 130E and 130G. More specifically, the solder bonding portion 191B has a fillet shape expanding outward in the X direction from the electrode 410, that is, in the X1 direction, as the solder bonding portion 191B extends from the portion 221B exposed by the opening portion HB toward the land 130E. The solder bonding portion 192B has a fillet shape that expands outward in the X direction from the electrode 420, that is, in the X2 direction, as the solder bonding portion 192B extends from the portion 221B exposed by the opening portion HB toward the land 130G. The X1 direction is a direction away from the electrode 410 in the X direction. The X2 direction is a direction opposite to the X1 direction in the X direction and is a direction away from the electrode 420. As a result, the bonding strength between each of the lands 130E and 130G and each of the electrodes 410 and 420 increases. In addition, each of the solder bonding portions 191B and 192B is prevented from having a shape bulging in the X direction, and each of the solder bonding portions 191B and 192B is prevented from being short-circuited with the adjacent solder bonding portion 193B.

In the third embodiment, as illustrated in FIG. 10B, the area S_HBof the opening portion HB, that is, the area S_221Bof the portion 221B exposed by the opening portion HB is larger than the area S₄₀₀of the capacitor 400 as viewed in the Z direction. Therefore, as illustrated in FIG. 9, a portion of the capacitor 400 in the Z direction is inserted into the opening portion HB, and the distance between the semiconductor device 100 and the printed wiring board 200B is narrowed.

Next, a method of manufacturing the processing module 300B will be described. FIGS. 11A to 11F are explanatory diagrams of the method of manufacturing the processing module 300B according to the third embodiment. As illustrated in FIG. 11A, the printed wiring board 200B is prepared (Step S21). In Step S21, the semiconductor device 100 and the capacitor 400 are also prepared. Next, as illustrated in FIG. 11B, the solder paste P1 which is the first solder paste, the solder paste P2 which is the second solder paste, and the solder paste P3 which is the third solder paste are supplied onto printed wiring board 200B at intervals (Step S22). In the third embodiment, in Step S22, the solder pastes P1 and P2 are supplied onto the portion 221B exposed by the opening portion HB formed in the solder resist 208B at intervals. In Step S22, the solder paste P3 is supplied onto the land 230 of the printed wiring board 200B.

In Step S22, the solder pastes P1, P2, and P3 are supplied to the printed wiring board 200B by screen printing using the metal mask 23. The method for supplying the solder pastes P1, P2, and P3 is not limited thereto. For example, the solder pastes P1, P2, and P3 may be supplied to the printed wiring board 200B by a dispenser.

Next, as illustrated in FIG. 11C, the capacitor 400 prepared in Step S21 is placed on printed wiring board 200B such that the electrode 410 is in contact with the solder paste P1 and the electrode 420 is in contact with the solder paste P2 (Step S23). As a result, the lower surface 415 of the electrode 410 comes into contact with the solder paste P1, and the lower surface 425 of the electrode 420 comes into contact with the solder paste P2. It is not necessary to attach solder balls to the electrodes 410 and 420 of the capacitor 400 in advance.

Next, as illustrated in FIG. 11D, the semiconductor device 100 prepared in Step S21 is mounted on the printed wiring board 200B such that the land 130E faces the electrode 410 and the land 130G faces the electrode 420 (Step S24). In Step S24, the semiconductor device 100 is placed on the printed wiring board 200B to bring the solder balls B, which are ball terminals provided on the lands 130S, into contact with the solder paste P3. In FIG. 11D, the upper surface 414 of the electrode 410 and the land 130E, and the upper surface 424 of the electrode 420 and the land 130G are not in contact with each other, but these may be in contact with each other.

In Step S24, the positional relationship among the printed wiring board 200B, the capacitor 400, and the semiconductor device 100 as viewed from the Z direction is as illustrated in FIG. 10B. When the capacitor 400 is placed on the printed wiring board 200B, each of the land 130E and the land 130G of the semiconductor device 100 overlaps at least a portion of each of the electrode 410 and the electrode 420 when viewed in the Z direction, and extends outward in the X direction from the capacitor 400.

Next, in a state where the semiconductor device 100 and the capacitor 400 are placed on the printed wiring board 200B, the printed wiring board 200B is conveyed to a reflow furnace (not illustrated). Then, in Step S25-1 illustrated in FIG. 11E, the temperature of the atmosphere in the reflow furnace is adjusted to a temperature equal to or higher than the melting point of the solder, and the solder pastes P1, P2, and P3 and the solder ball B in FIG. 11D are melted as illustrated in FIG. 11E. The solder paste P1 is melted to form a flowable molten solder M1, and the solder paste P2 is melted to form a flowable molten solder M2. When the solder paste P3 and the solder ball B are melted, a flowable molten solder M3 is obtained.

Subsequent to Step S25-1, in Step S25-2 illustrated in FIG. 11F, heating is continued to cause the molten solders M1 and M2 to flow. As illustrated in FIG. 11E, the molten solders M1 and M2 crawl up the side surfaces 411 and 421 in the upward direction indicated by the arrow Z1. Thereafter, the molten solders M1 and M2 move to the upper surfaces 414 and 424 as illustrated in FIG. 11F. Although not illustrated in FIG. 11, the molten solders M1 and M2 also crawl up in the upward direction indicated by the arrow Z1 on the side surface 412,413 of the electrode 410 and the side surfaces 422 and 423 of the electrode 420.

In addition, the capacitor 400 is pushed upward toward the semiconductor device 100 by the molten solders M1 and M2, the distance between the upper surface 414 of the electrode 410 and the land 130E is narrowed, and the distance between the upper surface 424 of the electrode 420 and the land 130G is narrowed. The molten solders M1 and M2 reaching the upper surfaces 414 and 424 come into contact with the lands 130E and 130G, wet-spread on the lands 130E and 130G, and have a fillet shape in which the skirt widens as it goes from the solder resist 208B toward the lands 130E and 130G.

Thereafter, the molten solders M1 and M2 wet-spread to the lands 130E and 130G are cooled and solidified. As a result, the molten solder M1 is cooled and solidified in a fillet shape on the land 130E. The molten solder M2 is cooled and solidified in a fillet shape on the land 130G. At the same time, the molten solder M3 is also cooled and solidified. As a result, solder bonding portions 191B, 192B, and 193B are formed as illustrated in FIG. 9. As described above, the processing module 300B illustrated in FIG. 9 is manufactured.

Thereafter, the processing module 300B illustrated in FIG. 9 is housed in the casing 611 illustrated in FIG. 1, thereby manufacturing a camera body of a digital camera which is an example of the electronic equipment.

As described above, by melting the solder pastes P1 and P2 supplied to the printed wiring board 200B, the solder can be supplied to the lands 130E and 130G of the semiconductor device 100 via the electrode 410,420 of the capacitor 400. As a result, it is not necessary to form solder balls on the electrodes 410,420 of the capacitor 400 in advance, and the process of manufacturing the processing module 300B can be reduced. Therefore, since the processing module 300B can be easily manufactured, productivity of the processing module 300B is improved.

In the third embodiment, since a portion of the capacitor 400 is inserted into the opening portion HB, the height of the solder bonding portions 191B, 192B, and 193B in the Z direction, that is, the interval between the semiconductor device 100 and the printed wiring board 200B in the Z direction can be narrowed. Therefore, the amount of solder in the solder bonding portions 191B, 192B, and 193B can be reduced, and the manufacturing cost of the processing module 300B can be reduced.

Example 1

Example 1 corresponding to the first embodiment will be described. In the semiconductor device 100 illustrated in FIG. 3, a minimum pitch of the solder balls B (FIG. 5D), which are two adjacent unbonded ball terminals, was 0.4 [mm]. A material of the land 130 was Cu. A material of each of the solder bonding portion 191, 192, and 193 was Sn-3.0% Ag 0.5% Cu. The area S₄₀₀of the capacitor 400 as viewed from the Z direction illustrated in FIG. 4B was 0.4 [mm]×0.2 [mm]. That is, the capacitor 400 was a 0402 chip component.

A thickness of the metal mask 23 illustrated in FIG. 5B used in the manufacturing process of the processing module 300 was set to 0.08 [mm] from the minimum pitch of the solder balls B, which are the two adjacent ball terminals before bonding in the semiconductor device 100, and the size of the capacitor 400.

In Steps S5-1 and S5-2 illustrated in