>i; the collection of bias in the i-th layer is denoted by b_i. The loss function associated with the DNN is denoted by

$f ({W_{i}}_{i = 1}^{N}, {b_{i}}_{i = 1}^{N}) .$

The problem of weight pruning and quantization is an optimization problem [57, 64]:

$\begin{matrix} \underset{{W_{i}}, {b_{i}}}{minimize} f ({W_{i}}_{i = 1}^{N}, {b_{i}}_{i = 1}^{N}), & (3) \\ subject to W_{i} \in S_{i}, i = 1, \dots, N . \end{matrix}$

Thanks to the flexibility in the definition of the constraint set S_i, the above formulation is applicable to the individual problems of weight pruning and weight quantization, as well as the joint problem. For the weight pruning problem, the constraint set Si={the number of nonzero weights is less than or equal to α_i}, where α_iis the desired number of weights after pruning in layer i¹. For the weight quantization problem, the set S_i={the weights in layer i are mapped to the quantization values} {Q₁, Q₂, . . . , Q_M}}, where M is the number of quantization values/levels. For quantization, these Q values are fixed, and the interval between two nearest quantization values is the same, in order to facilitate hardware implementations.

For the joint problem, the above two constraints need to be satisfied simultaneously. In other words, the number of nonzero weights should be less than or equal to a, in each layer, while the remaining nonzero weights should be quantized.

3.2 ADMM-based Solution Framework

The above problem is non-convex with combinatorial constraints, and cannot be solved using stochastic gradient descent methods (e.g., ADAM [29]) as in original DNN training. But it can be efficiently solved using the ADMM framework (combinatorial constraints can be gotten rid of.) To apply ADMM, we define indicator functions

$g_{i} (W_{i}) = {\begin{matrix} 0 & if W_{i} \in S_{i}, \\ + \infty & otherwise \end{matrix},$

for i=1, . . . , N. We then incorporate auxiliary variables Z_iand rewrite problem (3) as

$\begin{matrix} \underset{{W_{i}}, {b_{i}}}{minimize} f ({W_{i}}_{i = 1}^{N}, {b_{i}}_{i = 1}^{N}) + \sum_{i = 1}^{N} g_{i} (Z_{i}), & (4) \end{matrix}$

subject to W_i=Z_i, i=1, . . . , N.

Through application of the augmented Lagrangian [5], problem (4) is decomposed into two subproblems by ADMM. We solve the subproblems iteratively until convergence. The first subproblem is

$\begin{matrix} \underset{{W_{i}}, {b_{i}}}{minimize} f ({W_{i}}_{i = 1}^{N}, {b_{i}}_{i = 1}^{N}) + \sum_{i = 1}^{N} \frac{ρ_{i}}{2} { W_{i} - Z_{i}^{k} + U_{i}^{k} }_{F}^{2}, & (5) \end{matrix}$

where U^k_iis the dual variable updated in each iteration, U^k_i:U_i^k−1+W^k_i−Z^k_i. In the objective function of (5), the first term is the differentiable loss function of DNN, and the second quadratic term is differentiable and convex. The combinatorial constraints are effectively gotten rid of. This problem can be solved by stochastic gradient descent (e.g., ADAM) and the complexity is the same as training the original DNN.

The second subproblem is

$\begin{matrix} \underset{{Z_{i}}}{minimize} \sum_{i = 1}^{N} g_{i} (Z_{i}) + \sum_{i = 1}^{N} \frac{ρ_{i}}{2} { W_{i}^{k + 1} - Z_{i} + U_{i}^{k} }_{F}^{2} . & (6) \end{matrix}$

As g_i(·) is the indicator function of S_i, the analytical solution of subproblem (6) is

$Z_{i}^{k + 1} = \prod_{S_{i}} (W_{i}^{k + 1} + U_{i}^{k}),$

where ΠS_i(·) is Euclidean projection of W_i^k+1+U^k_ionto the set S_i. The details of the solution to this subproblem is problem-specific. For weight pruning and quantization problems, the optimal, analytical solutions of this problem can be found. The derived Z_i^k+1will be fed into the first subproblem in the next iteration.

The intuition of ADMM is as follows. In the context of DNNs, the ADMM-based framework can be understood as a smart regularization technique. Subproblem 1 (Eqn. (5)) performs DNN training with an additional L2 regularization term, and the regularization target Z_i^k−U^k_iis dynamically updated in each iteration through solving subproblem 2. This dynamic updating process is the key reason why ADMM-based framework outperforms conventional regularization method in DNN weight pruning and quantization.

3.3 Solution to Weight Pruning and Quantization, and the Joint Problem

Both weight pruning and quantization problems can be effectively solved using the ADMM framework. For the weight pruning problem, the Euclidean projection Eqn. (7) is to keep α_ielements in W_i^k+1+U^k_iwith largest magnitude and set the rest to be zero [38, 50]. This is proved to be the optimal and analytical solution to subproblem 2 (Eqn. (6)) in weight pruning.

For the weight quantization problem, the Euclidean projection Eqn. (7) is to set every element in W_i^k+1+U^k_ito be the quantization value closest to that element. This is also the optimal and analytical solution to subproblem 2 in quantization. The determination of quantization values will be discussed in details in the next subsection.

For both weight pruning and quantization problems, the first subproblem has the same form when Z^k_iis determined through Euclidean projection. As a result they can be solved in the same way by stochastic gradient descent (e.g., the ADAM algorithm).

For the joint problem of weight pruning and quantization, there is an additional degree of flexibility when performing Euclidean projection, i.e., a specific weight can be either projected to zero or to a closest quantization value. This flexibility will add difficulty in optimization. To overcome this hurdle, we perform weight pruning and quantization in two steps. We choose to perform weight pruning first, and then implement weight quantization on the remaining, non-zero weights. The reason for this order is the following observation: There typically exists higher degree of redundancy in the number of weights than the bit representation of weights. As a result, we can typically achieve higher model compression degree using weight pruning, without any accuracy loss, compared with quantization. The observation is validated by prior work [18, 20, 21] (although many are on clustering instead of quantization), and in our own investigations. FIG. 2 summaries the key steps of solving the joint weight pruning and quantization problem based on ADMM framework.

Thanks to the fast theoretical convergence rate of ADMM, the proposed algorithms have fast convergence. To achieve a good enough compression ratio for AlexNet, we need 72 hours for weight pruning and 24 hours for quantization. This is much faster than [24] that requires 173 hours for weight pruning only.

3.4 Details in Parameter Determination

3.4.1 Determination of Weight Numbers in Pruning:

The most important parameters in the ADMM-based weight pruning step are the a, values for each layer i. To determine these values, we start from the values derived from the prior weight pruning work [22, 24]. When targeting high compression ratio, we reduce the a_ivalues proportionally for each layer. When targeting computation reductions, we deduct the a_ivalues for convolutional (CONV) layers, because CONV layers account for the major computation compared with FC layers. Our experimental results demonstrate about 2-3× further compression under the same accuracy, compared with the prior work [15, 22, 24, 59].

The additional parameters in ADMM-based weight pruning, i.e., the penalty parameters ρ_i, are set to be ρ₁= . . . =ρ_N=3×10−3. This choice is basically very close for different DNN models, such as AlexNet [30] and VGG-16 [46]. The pruning results are not sensitive to the penalty parameters of the optimal choice, unless these parameters are increased or decreased by orders of magnitude.

3.4.2 Determination of Quantization Values:

After weight pruning is performed, the next step is weight quantization on the remaining, non-zero weights. We use n bits for equal-distance quantization to facilitate hardware implementations, which means there are a total of M=2ⁿquantization levels. More specifically, for each layer i, we quantize the weights into a set of quantization values

${- \frac{M}{2} q_{i}, \dots, - 2 q_{i}, - q_{i}, q_{i}, 2 q_{i}, \dots, \frac{M}{2} q_{i}} .$

Note that 0 is not a quantization value because it means that the corresponding weight has been pruned.

The interval q_iis the distance between two adjacent quantization values, and may be different for different layers. This is compatible with hardware implementations. This is because (i) the qi value of each layer is stored along with the quantized weights of that specific layer, and (ii) a scaling computation will be performed using the q_ivalue on the outputs of layer i. Such scaling computation is needed in equal-distance weight quantization [34, 55].

FIGS. 3A-3C show an example of weight quantization procedure. Suppose we have a 4×4 weight matrix. FIG. 3A shows the weights to be quantized, obtained after pruning. Based on the weight values, q_i=0.5, n=3, and M=2n are determined. FIG. 3B shows the weight values after quantization, and FIG. 3C shows the weights represented in quantization levels. Note that quantization levels encoded in binary bits are the operands to be stored and operated in the hardware. For the case of FIGS. 3A-3C, quantization levels {−4, −3, −2, −1, 1, 2, 3, 4} are encoded using 3 binary bits, since 0 denoting pruned weights is not needed. Weights in quantization levels (FIG. 3C) times q_i=0.5 resulting in quantized weights (FIG. 3B).

The interval q_iand number of quantization levels M(n) are predefined, and should be determined in an effective manner. For M(n) values, we start from the results of some prior work like [24], and reduce n accordingly. For example, [22] uses on average around 5 bits for quantization (essentially clustering) in AlexNet, whereas our results show that 3-4 bits on average are sufficient in quantization without incurring any accuracy loss, on representative benchmark DNNs.

To determine q_i, let w^j_idenote the j-th weight in layer i, and f(w^j_i) denote the quantization function to the closest quantization value. Then the total square error in a single quantization step is given by

$\sum_{j} {❘ w_{i}^{j} - f (w_{i}^{j}) ❘}^{2} .$

We derive q_iusing binary search method, such that the above total square error is minimized. In this way we determine both q_iand M (n) for weight quantization.

4 Results and Discussions on DNN Model Compressions

In this section, we summarize the software-level results on DNN model compression using the proposed ADMM framework of weight pruning and quantization. We perform testing on a set of representative DNN benchmarks, LeNet-5 [32] for MNIST dataset, AlexNet [30] (BVLC model and CaffeNet model, both open-source), VGGNet [46], and ResNet-50 [25] for ImageNet dataset. We initialize ADMM using pretrained DNN models and then perform weight pruning/quantization. We focus on the model compression of the overall DNN model (i.e., the total number of weights and total number of bits for weight representations). We perform comparison with representative works on DNN weight pruning and quantization (clustering), and demonstrate the significant improvement using the proposed ADMM framework. Algorithm implementations are on the open-source Caffe tool with code/model release, and DNN training and compression are performed using NVIDIA Tesla P100 and GeForce GTX 1080Ti GPUs.

4.1 Results on ADMM-Based Weight Pruning

Table 1 (FIG. 6) shows the weight pruning results on the LeNet-5 model, in comparison with various benchmarks. LeNet-5 contains two CONV layers, two pooling layers, and two FC layers, and can achieve 99.2% test accuracy on the MNIST dataset. Our ADMM-based weight pruning framework does not incur accuracy loss and can achieve a much higher weight pruning ratio on these networks compared with the prior iterative pruning heuristic [24], which reduces the number of weights by 12× on LeNet-5. In fact, our pruning method reduces the number of weights by 85×, which is 7.1× improvement compared with [24]. The maximum weight reduction is 167× for LeNet-5 when the accuracy is as high as 99.0%.

Similar results can be achieved on the BVLC AlexNet model and VGGNet model on the ImageNet ILSVRC-2012 dataset. The original BVLC AlexNet model can achieve a top-1 accuracy 57.2% and a top-5 accuracy 80.2% on the validation set, containing 5 CONV (and pooling) layers and 3 FC layers with a total of 60.9M parameters. The original VGGNet model achieves a top-1 accuracy 69.0% and top-5 accuracy 89.1% on ImageNet dataset, with a total of 138M parameters. Table 2 (FIG. 7) shows the weight pruning comparison results on AlexNet while Table 3 (FIG. 8) shows the comparison results on VGGNet. The proposed ADMM method can achieve 24× weight reduction in AlexNet and 26× weight reduction in VGGNet, without any accuracy loss. These results are at least twice as the state-of-the-art, and clearly demonstrate the advantage of the proposed weight pruning method using ADMM.

For the results on ResNet-50 model on ImageNet as shown in Table 4 (FIG. 9), we achieve 7× weigh pruning without accuracy degradation, and 17.4× with minor accuracy degradation less than 1%.

The reasons for the advantage are two folds: First, the ADMM-based framework is a systematic weight pruning framework based on optimization theory, which takes an overall consideration of the whole DNN instead of making local, greedy pruning choices. In fact, with a moderate pruning ratio of 3×, the top-1 accuracy of AlexNet can be even increased to 59.1%, almost 2% increase. Second, as discussed before, the ADMM-based framework can be perceived as a smart, dynamic DNN regularization technique, in which the regularization target is analytically adjusted in each iteration. This is very different from the prior regularization techniques [17, 53] in which the regularization target is predetermined and fixed.

4.2 Results on ADMM-Based Joint Weight Pruning and Quantization for DNNs

In this section we perform comparisons on the joint weight pruning and quantization results. Table 5 (FIG. 10) presents the results on LeNet-5, while Table 6 (FIG. 11) presents the results on AlexNet, VGGNet, and ResNet-50. We can simultaneously achieve 167× pruning ratio on LeNet-5, with an average of 2.78-bit for weight representation (fewer-bit representation for FC layers and more-bit for CONV layers). When accounting for the weight data representation only, the overall compression ratio is 1,910× on LeNet-5 when comparing with 32-bit floating point representations. For weight data representation, only 0.89 KB is needed for the whole LeNet-5 model with 99% accuracy. This is clearly approaching the theoretical limit considering the input size of 784 pixels (less than 1K) for each MNIST data sample.

For AlexNet and VGGNet models, we can use an average of 3.7-bit for weight representation. When accounting for the weight data only, the overall compression ratios are close to 200×. These results are significantly higher than the prior work such as [22, 24], even when [22] focuses on weight clustering instead of quantization. (Weight clustering is less hardware-friendly, but should perform better than weight quantization in model compression. The reason is because weight quantization can be perceived as a special case of clustering.) For example, [24] achieves 9× weight pruning on AlexNet and uses an average of higher than 5 bits (8 bits for CONV layers and 5 bits for FC layers) for weight representation. These results are also higher than performing weight quantization/clustering alone because the maximum possible gain when performing quantization/clustering alone is 32 (we need to use 1 bit per weight anyway) compared with floating-point representations, let alone accuracy degradations. These results clearly demonstrate the effectiveness of the proposed ADMM framework on joint weight pruning and quantization for DNNs. Similar results are also observed on the joint weight pruning and quantization results on ResNet-50 model.

However, the actual storage reduction cannot reach such a high gain. For DNNs, the model size is defined as the total number of bits (or Bytes) to actually store a DNN model. The reason for this gap is the indices, which are needed (at least) one per weight with weight pruning in order to locate the ID of the next weight [24]. For instance, we need more bits for each index for the pruned AlexNet than [24] because we achieve a higher pruning ratio. The storage requirement for indices will be even higher compared with the actual data, because the ADMM framework is very powerful in weight quantization. This will add certain overhead for the overall model storage, as also shown in the tables.

Finally, we point out that it may be somewhat biased when only considering the model size reduction of DNNs. We list in Table 7 (FIG. 12) the layer-wise weight pruning results for AlexNet, using the proposed ADMM framework. We can observe that the major weight pruning and quantization are achieved in the FC layers, compared with CONV layers. The reasons are that the FC layers account for more than 90% of weights and possess a higher degree of redundancy, thereby enabling higher degree of weight pruning/quantization. This is the same as the prior work such as [24], which achieves 9× overall weight reduction while only 2.7× reduction on CONV layers. It uses 5-bit for weight representation of FC layers and 8 bits for CONV layers. On the other hand, we emphasize that the CONV layers account for the major computation in state-of-the-art DNNs, e.g., 95% to 98% in AlexNet and VGGNet [30, 46], and even more for ResNet [25]. For computation reduction and energy efficiency improvement, it is more desirable to focus on CONV layers for weight pruning and quantization. This aspect will be addressed in the next section.

4.3 Making AlexNet and VGGNet On-Chip

An important indication of the proposed ADMM framework is that the weights of most of the largescale DNNs can be stored on-chip for FPGA and ASIC designs. Let us consider AlexNet and VGGNet as examples. For AlexNet, the number of weights before pruning is 60.9M, corresponding to 244 MB storage (model size) when 32-bit floating point number is utilized for weight representation. Using the proposed ADMM weight pruning and quantization framework, the total storage (model size) of AlexNet is reduced to 2.45 MB (using 2.25M weights) when the indices are accounted for. This model size is easily accommodated by the medium-to-high end FPGAs, such as Xilinx Kintex-7 series, and ASIC designs. This is achieved without any accuracy loss.

On the other hand, VGGNet, as one of the largest DNNs that is widely utilized, has a total number of 138M weights, corresponding to 552 MB storage when 32-bit floating point number is used for weight representation. Using the proposed ADMM framework, the total model size of VGGNet is reduced to 8.3 MB (using 6.9M weights) when the indices are accounted for. This model size can still be accommodated by a single high-end FPGA such as Altera (Intel) DE-5 and Xilinx Virtex-7. The effect that large-scale AlexNet and VGGNet models can be stored using on-chip memory of single FPGA/ASIC will significantly facilitate the wide application of large-scale DNNs, in embedded, mobile, and IoT systems. On the other hand, when accounting for the computation reductions rather than mere storage (model size) reduction, it is more desirable to focus mainly on the model compression on CONV layers rather than the whole DNN model. Also it is desirable to focus more on CONV layers since a smaller on-chip memory can be both cost and speed-beneficial, which is critical especially for custom ASIC.

5. Hardware-Aware Computation Reduction

Motivation: As discussed in the previous section and illustrated in Table 7 (FIG. 12), the current gains in weight pruning and quantization are mainly attributed to the redundancy in FC layers. This optimization target is not the most desirable when accounting for the computation reduction and energy efficiency improvement. The reason is that CONV layers account for the major computation in state-of-the-art DNNs, even reaching 98% to 99% for the recent VGGNet and ResNet models [30, 46]. In actual ASIC design and implementations, it will be desirable to allocate on-chip memory for the compressed CONV layers while using off-chip memory for the less computationally intensive FC layers. In this way the on-chip memory can be reduced, the memory speed can be faster, while the major computation part of DNN (CONV layers) can be accelerated. Therefore it is suggested to perform weight pruning and quantization focusing on the CONV layers.

The prior weight pruning work [22, 24] cannot achieve a satisfactory weight pruning ratio on CONV layers while guaranteeing the overall accuracy. For example, [24] achieves only 2.7× weight pruning on the CONV layers of AlexNet. In fact, the highest gain in reference work on CONV layer pruning is 5.0× using L1 regularization [53], and does not perform any pruning on FC layers. Sometimes, a low weight pruning ratio will result in hardware performance degradation, as reported in a number of actual hardware implementations [53, 56, 58]. The key reason is the irregularity in weight storage, the associated overhead in calculating weight indices, and the degradation in parallelism. This overhead is encountered in the PE (processing element) design when sparsity (weight pruning) is utilized. This performance overhead should be accurately characterized and effectively accounted for in the hardware-aware weight pruning framework.

5.1 Algorithm-Hardware Co-Optimization

In a nutshell, we need to (i) focus mainly on CONV layers in weight pruning/quantization, and (ii) effectively account for the hardware performance overhead for irregular weight storage, in order to facilitate efficient hardware implementations. We start from an observation about coordinating weight pruning in CONV and FC layers for maintaining overall accuracy.

Observation on Coordinating Weight Pruning: Even when we focus on CONV layer weight pruning, we still need to prune the FC layers moderately (e.g., about 3-4×) for maintaining the overall accuracy. Otherwise it will incur certain accuracy degradation.

Although lack of formal proof, the observation can be intuitively understood in the following way: The original DNN models, such as LeNet-5, AlexNet, or VGGNet, are heavily optimized and the structures of CONV and FC layers match each other. Pruning the CONV layers alone will incur mismatch in structure and number of weights with the FC layers, thereby incurring overfitting and accuracy degradation. This is partially the reason why prior work like L1 regularization [53] does not have satisfactory performance even when only focusing on CONV layers. This observation brings 0.5% to 1% accuracy improvement, along with additional benefit of simultaneous computation reduction and model size reduction, and will be exploited in our framework.

Break-even Weight Pruning Ratio: Next, we define the concept of break-even weight pruning ratio, as the minimum weight pruning ratio of a specific (CONV or FC) layer that will not result in hardware performance degradation. Below this break-even ratio, performance degradation will be incurred, as actually observed in [53, 56, 58]. This break-even pruning ratio is greater than 1 because of the hardware performance overhead from irregular sparsity. It is hardware platform-specific. It is important to the hardware-aware weight pruning framework. For example, if the actual weight pruning ratio for a specific layer is lower than the break-even ratio, there is no need to perform weight pruning on this layer. In this case, we will restore the original structure of this layer and this will leave more margin for weight pruning in the other layers with more benefits.

Break-even Pruning Ratio Calculation: To calculate the break-even pruning ratios, we fairly compare (i) the inference delay of the hardware implementation of the original DNN layer without pruning with (ii) the delays of hardware implementations under various pruning ratios. The comparison is under the same hardware area/resource. We control two variables: (i) a predefined, limited hardware area, and (ii) the goal to complete all computations in one DNN layer, which will be different under various pruning ratios. Specifically, we set the hardware implementation of the original layer as baseline, thus its hardware area becomes a hard limit. Any hardware implementations supporting weight pruning cannot exceed this limit.

Hardware resources of the baseline comprise two parts: one is process elements (PE) responsible for GEMM (general matrix multiplication) and activation calculations, and the other is SRAM that stores features, weights, and biases. Although the implementations under various pruning ratios are also composed of PEs and SRAMs, the differences lie in three aspects: (i) the area occupied by SRAM is different. This is because with different pruning ratios, the numbers of indices are different, and the numbers of weights are different as well; (ii) the remaining resources for PE implementation are thus different. It is possible to have more resources for PE implementation or less; (iii) the maximum frequency of each type of implementations is different, due to the difference in the size of PEs and index decoding components.

Being aware of these differences, we implement the baseline and 9 pruning cases with pruning portions ranging from 10% to 90%. We adopt the state-of-the-art hardware architecture to support weight pruning [39, 60]. The hardware implementations are synthesized in SMIC 40 nm CMOS process using Synopsys Design Compiler. Then we measure the delay values of those implementations. The speedup values of the pruning cases over the baseline are depicted in FIG. 4. In the figure, the speedup of the baseline itself is 1, and the results suggest that the pruning portion should be higher than about 55%, in order to make sure that the benefits of pruning outperforms the overhead of indices. This corresponds to a break-even weight pruning ratio of 2.22.

Hardware-Aware DNN Model Compression Algorithm: Based on the efficient calculation of such break-even pruning ratios, we develop efficient hardware-aware DNN model compression algorithm. We mainly focus on the CONV layers and perform weight pruning/quantization on FC layers accordingly to maintain accuracy. The detailed algorithm description is in FIG. 5 as detailed in the following.

Consider a DNN with N′ CONV layers. Let C_i(1≤i≤N′) denote the amount of computation, in the total number of operations, of the original DNN without weight pruning. Let α_idenote the portion of remaining weights in layer i after weight pruning, and 1/α_idenotes the pruning ratio in layer i. We start from pretrained DNN models, and initialize α_ivalues from those in the prior work such as [22, 24], which can partially reveal the sensitivity to weight pruning for each layer. Since (i) our ADMM framework achieves higher performance and (ii) we focus mainly on CONV layers, we are able to reduce α_ivalues for different i. This is an iterative procedure. The amount of reduction Δα_iin each iteration is proportional to Ci. The underlying principle is to reduce the computation to a larger extent in those layers that are more computationally intensive (and likely, with a higher degree of redundancy). Binary search algorithm is exploited to find the updated α_ivalues that will not result in any accuracy degradation (this constraint can be relieved to a pre-defined accuracy degradation constraint). Note that the FC layers will be pruned in accordance through this procedure for accuracy considerations.

The next step is to check whether the pruning ratios 1/α_isurpass the hardware-specific break-even pruning ratio. If not, then performing pruning on layer i will not be beneficial for hardware acceleration. In this case we will (i) restore the structure for all layers that cannot surpass the break-even ratio (e.g., the first layer in AlexNet in practice), and (ii) reduce the a values of the other layers and perform ADMM-based weight pruning. Binary search is also utilized to accelerate the search. Upon convergence those layers will still surpass the break-even pruning ratio since we only decrease a values in the procedure.

After weight pruning, we perform ADMM-based weight quantization in order to further reduce computation and improve energy efficiency. Weight quantization is performed on both CONV and FC layers, but CONV layers will be given top priority in this procedure.

6. Results and Discussions on Computation Reduction and Hardware-Aware Optimizations

In this section, we first perform comparison on the computation reduction results focusing on the CONV layers (FC layers will be pruned accordingly as well to maintain accuracy). Next we compare on the synthesized hardware speedup results between the proposed hardware-aware DNN model compression algorithm with baselines. The baselines include the iterative weight pruning and weight clustering work [22, 24], and recent work [36, 53] of DNN weight pruning focusing on computation reductions. Due to space limitation, we only illustrate the comparison results on AlexNet (BVLC and CaffeNet models) on ImageNet dataset, but we achieve similar results on other benchmarks. Again algorithm implementations are on the open-source Caffe tool with code/model release, and DNN model training and model compression are performed using NVIDIA 1080Ti and P100 GPUs.

6.1 Computation Reduction Comparisons

Table 8 (FIG. 13) illustrates the comparison results on the computation reduction for the five CONV layers of AlexNet model. We show both layer-wise results and the overall results for all CONV layers. We use two metrics to quantify computation reduction. The first metric is the number of multiply-and-accumulation (MAC) operations, the key operations in the DNN inference procedure. This metric is directly related to the hardware performance (speed). The second metric is the product of the number of MAC operations and bit quantization width for each weight. This metric is directly related to the energy efficiency of (FPGA or ASIC) hardware implementation.

As can be observed in the table, the proposed ADMM framework achieves significant amount of computation reduction compared with prior work, even when some [36, 53] also focus on computation reductions. For the first metric of computation reduction, the improvement can be close to 3× compared with prior work for CONV layers, and this improvement reaches 3.6× for the second metric. The improvement on the second metric of computation reduction is even higher because of the higher capability of the proposed method in weight quantization. We can also observe that the first CONV layer is more difficult for weight pruning and quantization compared with the other layers. This will impact the hardware speedup as shall be seen in the latter discussions.

Because CONV layers are widely acknowledged to be more difficult to perform pruning than FC layers, the high performance in CONV layer pruning and quantization further demonstrates the effectiveness of the ADMM-based DNN model compression technique. Besides, although our results focus on CONV layer compression, we achieve 13× weight pruning ratio on the overall DNN model because FC layers are pruned as well. The overall weight pruning on DNN model is also higher than the prior work. The layer-wise pruning results are shown in Table 8 (FIG. 13). In this way we simultaneously achieve computation and model size reduction.

6.2 Synthesized Hardware Speedup Comparisons

Table 9 (FIG. 14) illustrates the comparison results, between the hardware-aware DNN model compression algorithm and baselines, on the synthesized hardware speedup for the five CONV layers of AlexNet model. The overall weight pruning ratio on the five CONV layers is also provided. We show both layer-wise results and the overall results for all CONV layers. The overall result is a weighted sum of the layer-wise results because of different amount of computation/parameters for each layer. The synthesized results are based on (i) the PE synthesis based on SMIC 40 nm CMOS process using Synopsys Design Compiler, and (ii) the execution on a representative CONV layer (CONV4 of AlexNet). The hardware synthesis process accounts for the hardware performance overhead of weight pruning. Although the synthesis is based on ASIC setup, the conclusion generally holds for FPGA as well. For hardware speedup synthesis, we use the same number of PEs for the proposed method and baselines, and do not account for the advantage of the proposed method in weight quantization. This metric is conservative for the proposed method, but could effectively illustrate the effect of hardware-aware DNN optimization and the break-even pruning ratio.

In terms of hardware synthesis results, our methods result in speedup compared with original DNNs without compression. On the other hand, the baselines suffer from speed degradations. Such degradations are actually observed in prior work [24, 53, 58]. As can be observed from the table, we do not perform any weight pruning on the first CONV layer. This is because the weight pruning ratio for this layer is lower than the break-even pruning ratio derived in the previous section. In this way weight pruning will not bring about any speedup benefit for this layer. The underlying reason is that weights in the first CONV layer are directly connected to the pixels of the input image, and therefore most of the weights in the first CONV layer are useful. Hence the margin of weight pruning in the first CONV layer is limited. Although the first CONV layer is small compared with the other layers in terms of the number of weights, it will become the computation bottleneck among all CONV layers. This observation is also true in other DNNs like VGGNet or ResNet. When neglecting this factor, the baseline methods will incur degradation in the speed (which is common for all baselines in the first CONV layer) compared with the original DNN models without compression. Of course, speedups will be observed in baselines if they leave CONV1 unchanged.

When we target at further weight pruning on the CONV layers with certain degree of accuracy loss, we can achieve 25.5× weight pruning on overall CONV layers (40.5× pruning on CONV2-5) with only 1.5% accuracy loss. In contrast to the significant pruning ratio, the synthesized speedup only has a marginal increase. This is because of the bottleneck of CONV1 and the saturation of speedup in the other CONV layers.

7. Technical Advantages

The ADMM techniques can achieve 85× and 24× pruning on representative LeNet-5 and AlexNet models, respectively, without accuracy loss. This is significantly higher than prior work (around 10× pruning). The improvement becomes more significant when focusing on computing reductions.

When combining weight pruning and quantization, the techniques can achieve 1,910× and 231× reductions in overall model size on these two benchmarks in connection with weight data storage.

Highly promising results are also observed on other representative DNNs such as VGGNet and ResNet-50.

Significant on-chip acceleration of DNN inference can be achieved due to significantly reduced computation, storage, and communication costs. On-chip storage of the whole DNN models is feasible.

This technology can allow tens of times acceleration of deep learning/AI applications using the same hardware. It can also allow tens of times reduction in hardware footprint, power/energy consumption for the same application/task (even more than that because the on-chip memory system can be significantly reduced or even eliminated sometimes). This results in significant commercial and financial advantages, tens of times cost/energy consumption reduction, or tens of times throughput enhancement. The technology can be implemented in mobile and sensor applications. It can also support machine intelligence.

The technology is generally applicable to any application that requires real-time, fast implementation of deep learning and AI systems. It can enable wide application of DNNs on embedded, mobile, and IoT systems. Examples of applications include autonomous driving systems, unmanned aerial vehicles (UAVs), intelligent robotic systems, real-time medical imaging applications, cloud-based AI and deep learning accelerators, and field testing, road scan, and sensor-based intelligent systems.

The methods, operations, modules, and systems described herein particularly for compressing DNN models using ADMM techniques may be implemented in one or more computer programs executing on a programmable computer system. FIG. 15 is a simplified block diagram illustrating an exemplary computer system 510, on which the one or more computer programs may operate as a set of computer instructions. The computer system 510 includes, among other things, at least one computer processor 512, system memory 514 (including a random access memory and a read-only memory) readable by the processor 512. The computer system 510 also includes a mass storage device 516 (e.g., a hard disk drive, a solid-state storage device, an optical disk device, etc.). The computer processor 512 is capable of processing instructions stored in the system memory or mass storage device. The computer system additionally includes input/output devices 518, 520 (e.g., a display, keyboard, pointer device, etc.), a graphics module 522 for generating graphical objects, and a communication module or network interface 524, which manages communication with other devices via telecommunications and other networks.

Each computer program can be a set of instructions or program code in a code module resident in the random access memory of the computer system. Until required by the computer system, the set of instructions may be stored in the mass storage device or on another computer system and downloaded via the Internet or other network.

Having thus described several illustrative embodiments, it is to be appreciated that various alterations, modifications, and improvements will readily occur to those skilled in the art. Such alterations, modifications, and improvements are intended to form a part of this disclosure, and are intended to be within the spirit and scope of this disclosure. While some examples presented herein involve specific combinations of functions or structural elements, it should be understood that those functions and elements may be combined in other ways according to the present disclosure to accomplish the same or different objectives. In particular, acts, elements, and features discussed in connection with one embodiment are not intended to be excluded from similar or other roles in other embodiments.

Additionally, elements and components described herein may be further divided into additional components or joined together to form fewer components for performing the same functions. For example, the computer system may comprise one or more physical machines, or virtual machines running on one or more physical machines. In addition, the computer system may comprise a cluster of computers or numerous distributed computers that are connected by the Internet or another network.

Accordingly, the foregoing description and attached drawings are by way of example only, and are not intended to be limiting.

REFERENCES

[1] Osborne, Joe. “Google's Tensor Processing Unit explained: this is what the future of computing looks like.” Techradar, 22 Aug. 2016, www.techradar.com/news/computing-components/processors/google-s-tensor-processing-unit-explained-this-is-what-the-future-of-computing-looks-like-1326915.

[2] Matsumoto, Craig. “Intel's Deep Learning Chips Will Arrive in 2017.” Sdxcentral, 18 Nov. 2016, www.sdxcentral.com/articles/news/intels-deep-learning-chips-will-arrive-2017.

[3] Aghasi, A., Abdi, A., Nguyen, N., and Romberg, J. Net-trim: Convex pruning of deep neural networks with performance guarantee. In Advances in Neural Information Processing Systems (2017), pp. 3177-3186.

[4] Bang, S., Wang, J., Li, Z., Gao, C., Kim, Y., Dong, Q., Chen, Y.-P., Fick, L., Sun, X., Dreslinski, R., et al. 14.7 a 288 μw programmable deep-learning processor with 270 kb on-chip weight storage using non-uniform memory hierarchy for mobile intelligence. In Solid-State Circuits Conference (ISSCC), 2017 IEEE International (2017), IEEE, pp. 250-251.

[5] Boyd, S., Parikh, N., Chu, E., Peleato, B., Eckstein, J., et al. Distributed optimization and statistical learning via the alternating direction method of multipliers. Foundations and Trends® in Machine learning 3, 1 (2011), 1-122.

[6] Chen, T., Du, Z., Sun, N., Wang, J., Wu, C., Chen, Y., and Temam, O. Diannao: A small-footprint high-throughput accelerator for ubiquitous machine-learning. ACM Sigplan Notices 49 (2014), 269-284.

[7] Chen, Y., Luo, T., Liu, S., Zhang, S., He, L., Wang, J., Li, L., Chen, T., Xu, Z., Sun, N., et al. Dadiannao: A machine-learning supercomputer. In Proceedings of the 47th Annual IEEE/ACM International Symposium on Microarchitecture (2014), IEEE Computer Society, pp. 609-622.

[8] Chen, Y.-H., Krishna, T., Emer, J. S., and Sze, V. Eyeriss: An energy-efficient reconfigurable accelerator for deep convolutional neural networks. IEEE Journal of Solid-State Circuits 52, 1 (2017), 127-138.

[9] Courbariaux, M., Bengio, Y., and David, J.-P. Binaryconnect: Training deep neural networks with binary weights during propagations. In Advances in neural information processing systems (2015), pp. 3123-3131.

[10] Dai, X., Yin, H., and Jha, N. K. Nest: a neural network synthesis tool based on a grow-and-prune paradigm. arXiv preprint arXiv:1711.02017 (2017).

[11] Deng, J., Dong, W., Socher, R., Li, L.-J., Li, K., and Fei-Fei, L. Imagenet: A large-scale hierarchical image database. In Proceedings of the IEEE Conference on Computer Vision and Pattern Recognition (2009), pp. 248-255.

[12] Denton, E. L., Zaremba, W., Bruna, J., LeCun, Y., and Fergus, R. Exploiting linear structure within convolutional networks for efficient evaluation. In Advances in neural information processing systems (2014), pp. 1269-1277.