TI unveils clock buffers with ultra-low noise floor and additive jitter

Texas Instruments Incorporated (TI) today expanded its high-performance clock buffer portfolio with the introduction of two new universal clock buffer families. The CDCLVC1310 LVCMOS clock buffer delivers a phase noise floor of –169 dBc/Hz in crystal mode. The LMK00101/05 complements the family with flexible output voltage level configurations. The LMK00301/04/06/08 differential-ended family offers ultra-low additive jitter of 51 femtoseconds (fs). Features included in the CDCLVC1310 include Universal input architecture (LVPECL, LVDS, HCSL, SSTL, LVCMOS) and built-in voltage level and signal translator reduce board space by 50 percent. Universal I/O supply voltage (1.5V, 1.8V, 2.5V, 3.3V) simplifies system design and reduces bill of materials (BOM) cost by 50 percent.