Search

Catherine R Oliver-garcia

Examiner (ID: 14966, Phone: (571)272-2655 , Office: P/2914 )

Most Active Art Unit
2914
Art Unit(s)
2900, 2914, 2904
Total Applications
7018
Issued Applications
6962
Pending Applications
5
Abandoned Applications
51

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17240130 [patent_doc_number] => 11184025 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-11-23 [patent_title] => LDPC decoding method and LDPC decoding apparatus [patent_app_type] => utility [patent_app_number] => 17/159681 [patent_app_country] => US [patent_app_date] => 2021-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 9467 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17159681 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/159681
LDPC decoding method and LDPC decoding apparatus Jan 26, 2021 Issued
Array ( [id] => 16858144 [patent_doc_number] => 20210158889 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-27 [patent_title] => SYSTEMS AND METHODS FOR IMPLEMENTING REDUNDANCY FOR TILE-BASED INTELLIGENCE PROCESSING COMPUTING ARCHITECTURE [patent_app_type] => utility [patent_app_number] => 17/087830 [patent_app_country] => US [patent_app_date] => 2020-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12021 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17087830 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/087830
Systems and methods for implementing redundancy for tile-based intelligence processing computing architecture Nov 2, 2020 Issued
Array ( [id] => 17269235 [patent_doc_number] => 11194661 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-12-07 [patent_title] => Memory system for accessing data in stripe form and operating method thereof [patent_app_type] => utility [patent_app_number] => 17/069012 [patent_app_country] => US [patent_app_date] => 2020-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 12304 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17069012 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/069012
Memory system for accessing data in stripe form and operating method thereof Oct 12, 2020 Issued
Array ( [id] => 17288284 [patent_doc_number] => 11204834 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-12-21 [patent_title] => Implementation of keeping data integrity in multiple dimensions [patent_app_type] => utility [patent_app_number] => 17/033730 [patent_app_country] => US [patent_app_date] => 2020-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7112 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17033730 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/033730
Implementation of keeping data integrity in multiple dimensions Sep 25, 2020 Issued
Array ( [id] => 17331451 [patent_doc_number] => 11221915 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-01-11 [patent_title] => Memory controller and method of operating the same [patent_app_type] => utility [patent_app_number] => 17/012805 [patent_app_country] => US [patent_app_date] => 2020-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 19 [patent_no_of_words] => 13703 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17012805 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/012805
Memory controller and method of operating the same Sep 3, 2020 Issued
Array ( [id] => 17254704 [patent_doc_number] => 11190212 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-11-30 [patent_title] => Dynamic control of quasi-cyclic low-density parity-check bit-flipping decoder [patent_app_type] => utility [patent_app_number] => 16/938481 [patent_app_country] => US [patent_app_date] => 2020-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5608 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16938481 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/938481
Dynamic control of quasi-cyclic low-density parity-check bit-flipping decoder Jul 23, 2020 Issued
Array ( [id] => 16403058 [patent_doc_number] => 20200343916 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-29 [patent_title] => DECODING METHOD AND APPARATUS [patent_app_type] => utility [patent_app_number] => 16/923898 [patent_app_country] => US [patent_app_date] => 2020-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18649 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 374 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16923898 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/923898
Decoding method and apparatus Jul 7, 2020 Issued
Array ( [id] => 16393165 [patent_doc_number] => 20200334106 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-22 [patent_title] => Data Storage Method, Apparatus, and System [patent_app_type] => utility [patent_app_number] => 16/922706 [patent_app_country] => US [patent_app_date] => 2020-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9697 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16922706 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/922706
Data storage method, apparatus, and system Jul 6, 2020 Issued
Array ( [id] => 17309131 [patent_doc_number] => 11210242 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-28 [patent_title] => Memory system with cached memory module operations [patent_app_type] => utility [patent_app_number] => 16/888551 [patent_app_country] => US [patent_app_date] => 2020-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 52 [patent_figures_cnt] => 122 [patent_no_of_words] => 10275 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16888551 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/888551
Memory system with cached memory module operations May 28, 2020 Issued
Array ( [id] => 16669248 [patent_doc_number] => 10938511 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-02 [patent_title] => Apparatus for transmitting broadcast signal, apparatus for receiving broadcast signal, method for transmitting broadcast signal and method for receiving broadcast signal [patent_app_type] => utility [patent_app_number] => 16/842297 [patent_app_country] => US [patent_app_date] => 2020-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 148 [patent_figures_cnt] => 161 [patent_no_of_words] => 111262 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16842297 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/842297
Apparatus for transmitting broadcast signal, apparatus for receiving broadcast signal, method for transmitting broadcast signal and method for receiving broadcast signal Apr 6, 2020 Issued
Array ( [id] => 16567395 [patent_doc_number] => 10892776 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-01-12 [patent_title] => Memory controller and method of accessing flash memory [patent_app_type] => utility [patent_app_number] => 16/835939 [patent_app_country] => US [patent_app_date] => 2020-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 6464 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16835939 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/835939
Memory controller and method of accessing flash memory Mar 30, 2020 Issued
Array ( [id] => 17031518 [patent_doc_number] => 11093329 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-08-17 [patent_title] => RAID proxy storage-device-assisted data update system [patent_app_type] => utility [patent_app_number] => 16/832752 [patent_app_country] => US [patent_app_date] => 2020-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 11240 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16832752 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/832752
RAID proxy storage-device-assisted data update system Mar 26, 2020 Issued
Array ( [id] => 17194884 [patent_doc_number] => 11163639 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-11-02 [patent_title] => Memory system and method for controlling nonvolatile memory [patent_app_type] => utility [patent_app_number] => 16/816396 [patent_app_country] => US [patent_app_date] => 2020-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 11104 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16816396 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/816396
Memory system and method for controlling nonvolatile memory Mar 11, 2020 Issued
Array ( [id] => 17331449 [patent_doc_number] => 11221913 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-01-11 [patent_title] => Error check and scrub for semiconductor memory device [patent_app_type] => utility [patent_app_number] => 16/816024 [patent_app_country] => US [patent_app_date] => 2020-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 11224 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16816024 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/816024
Error check and scrub for semiconductor memory device Mar 10, 2020 Issued
Array ( [id] => 16972192 [patent_doc_number] => 11068163 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-07-20 [patent_title] => Storing a credential in a storage network [patent_app_type] => utility [patent_app_number] => 16/807076 [patent_app_country] => US [patent_app_date] => 2020-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 35 [patent_no_of_words] => 24252 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16807076 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/807076
Storing a credential in a storage network Mar 1, 2020 Issued
Array ( [id] => 16714128 [patent_doc_number] => 20210081275 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-18 [patent_title] => MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 16/804940 [patent_app_country] => US [patent_app_date] => 2020-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14879 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16804940 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/804940
Memory system Feb 27, 2020 Issued
Array ( [id] => 16803958 [patent_doc_number] => 10998920 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-05-04 [patent_title] => Overcoming saturated syndrome condition in estimating number of readout errors [patent_app_type] => utility [patent_app_number] => 16/801249 [patent_app_country] => US [patent_app_date] => 2020-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8457 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16801249 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/801249
Overcoming saturated syndrome condition in estimating number of readout errors Feb 25, 2020 Issued
Array ( [id] => 16866523 [patent_doc_number] => 11025283 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-06-01 [patent_title] => Decoding latency and throughput of a multi-decoder error correction system [patent_app_type] => utility [patent_app_number] => 16/801871 [patent_app_country] => US [patent_app_date] => 2020-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 12416 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16801871 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/801871
Decoding latency and throughput of a multi-decoder error correction system Feb 25, 2020 Issued
Array ( [id] => 17309041 [patent_doc_number] => 11210151 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-12-28 [patent_title] => Peer-assisted data rebuilding [patent_app_type] => utility [patent_app_number] => 16/794617 [patent_app_country] => US [patent_app_date] => 2020-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 6409 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16794617 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/794617
Peer-assisted data rebuilding Feb 18, 2020 Issued
Array ( [id] => 17039285 [patent_doc_number] => 20210255921 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-08-19 [patent_title] => METHOD OF CONTROLLING VERIFICATION OPERATIONS FOR ERROR CORRECTION OF NON-VOLATILE MEMORY DEVICE, AND NON-VOLATILE MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 16/791529 [patent_app_country] => US [patent_app_date] => 2020-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4962 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16791529 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/791529
Method of controlling verification operations for error correction of non-volatile memory device, and non-volatile memory device Feb 13, 2020 Issued
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